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| author | Ralf Goebel <ralf.goebel@imago-technologies.com> | 2018-08-06 18:00:36 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2018-08-08 12:08:09 +0300 |
| commit | 04c532a1cdc7e423656c07937aa4b5c1c2b064f9 (patch) | |
| tree | f597dae2d4d02140fdfabcd3ee1b9a591b596f96 /firmware | |
| parent | 1ffaddd029c867d134a1dde39f540dcc8c52e274 (diff) | |
| download | linux-04c532a1cdc7e423656c07937aa4b5c1c2b064f9.tar.xz | |
iommu/omap: Fix cache flushes on L2 table entries
The base address used for DMA operations on the second-level table
did incorrectly include the offset for the table entry. The offset
was then added again which lead to incorrect behavior.
Operations on the L1 table are not affected.
The calculation of the base address is changed to point to the
beginning of the L2 table.
Fixes: bfee0cf0ee1d ("iommu/omap: Use DMA-API for performing cache flushes")
Acked-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Ralf Goebel <ralf.goebel@imago-technologies.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'firmware')
0 files changed, 0 insertions, 0 deletions