diff options
author | Rob Clark <robdclark@gmail.com> | 2014-09-05 21:30:27 +0400 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2014-09-10 19:19:08 +0400 |
commit | e2550b7a7d8f2030cfea43343eb3fccc3a8e8167 (patch) | |
tree | db048e044c8c6fe5e0984d2e7067adea5e31e268 /drivers | |
parent | bfd28b136298f37ef2e10494d3a0bfb4dcbaa7b9 (diff) | |
download | linux-e2550b7a7d8f2030cfea43343eb3fccc3a8e8167.tar.xz |
drm/msm/adreno: move decision about what gpu to to load
Move this into into adreno_device, and decide based on gpu revision
rather than just assuming a3xx.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_device.c | 112 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_gpu.c | 71 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_gpu.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/msm_drv.c | 31 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.h | 2 |
5 files changed, 128 insertions, 99 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 124e23d63018..b03290e3948a 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -21,6 +21,118 @@ # include <mach/kgsl.h> #endif +#define ANY_ID 0xff + +struct msm_gpu *a3xx_gpu_init(struct drm_device *dev); + +static const struct adreno_info gpulist[] = { + { + .rev = ADRENO_REV(3, 0, 5, ANY_ID), + .revn = 305, + .name = "A305", + .pm4fw = "a300_pm4.fw", + .pfpfw = "a300_pfp.fw", + .gmem = SZ_256K, + .init = a3xx_gpu_init, + }, { + .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID), + .revn = 320, + .name = "A320", + .pm4fw = "a300_pm4.fw", + .pfpfw = "a300_pfp.fw", + .gmem = SZ_512K, + .init = a3xx_gpu_init, + }, { + .rev = ADRENO_REV(3, 3, 0, ANY_ID), + .revn = 330, + .name = "A330", + .pm4fw = "a330_pm4.fw", + .pfpfw = "a330_pfp.fw", + .gmem = SZ_1M, + .init = a3xx_gpu_init, + }, +}; + +MODULE_FIRMWARE("a300_pm4.fw"); +MODULE_FIRMWARE("a300_pfp.fw"); +MODULE_FIRMWARE("a330_pm4.fw"); +MODULE_FIRMWARE("a330_pfp.fw"); + +static inline bool _rev_match(uint8_t entry, uint8_t id) +{ + return (entry == ANY_ID) || (entry == id); +} + +const struct adreno_info *adreno_info(struct adreno_rev rev) +{ + int i; + + /* identify gpu: */ + for (i = 0; i < ARRAY_SIZE(gpulist); i++) { + const struct adreno_info *info = &gpulist[i]; + if (_rev_match(info->rev.core, rev.core) && + _rev_match(info->rev.major, rev.major) && + _rev_match(info->rev.minor, rev.minor) && + _rev_match(info->rev.patchid, rev.patchid)) + return info; + } + + return NULL; +} + +struct msm_gpu *adreno_load_gpu(struct drm_device *dev) +{ + struct msm_drm_private *priv = dev->dev_private; + struct platform_device *pdev = priv->gpu_pdev; + struct adreno_platform_config *config; + struct adreno_rev rev; + const struct adreno_info *info; + struct msm_gpu *gpu = NULL; + + if (!pdev) { + dev_err(dev->dev, "no adreno device\n"); + return NULL; + } + + config = pdev->dev.platform_data; + rev = config->rev; + info = adreno_info(config->rev); + + if (!info) { + dev_warn(dev->dev, "Unknown GPU revision: %u.%u.%u.%u\n", + rev.core, rev.major, rev.minor, rev.patchid); + return NULL; + } + + DBG("Found GPU: %u.%u.%u.%u", rev.core, rev.major, + rev.minor, rev.patchid); + + gpu = info->init(dev); + if (IS_ERR(gpu)) { + dev_warn(dev->dev, "failed to load adreno gpu\n"); + gpu = NULL; + /* not fatal */ + } + + if (gpu) { + int ret; + mutex_lock(&dev->struct_mutex); + gpu->funcs->pm_resume(gpu); + mutex_unlock(&dev->struct_mutex); + ret = gpu->funcs->hw_init(gpu); + if (ret) { + dev_err(dev->dev, "gpu hw init failed: %d\n", ret); + gpu->funcs->destroy(gpu); + gpu = NULL; + } else { + /* give inactive pm a chance to kick in: */ + msm_gpu_retire(gpu); + } + } + + return gpu; +} + static void set_gpu_pdev(struct drm_device *dev, struct platform_device *pdev) { diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 655ce5b14ad0..c64340fcfbfe 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -19,46 +19,6 @@ #include "msm_gem.h" #include "msm_mmu.h" -struct adreno_info { - struct adreno_rev rev; - uint32_t revn; - const char *name; - const char *pm4fw, *pfpfw; - uint32_t gmem; -}; - -#define ANY_ID 0xff - -static const struct adreno_info gpulist[] = { - { - .rev = ADRENO_REV(3, 0, 5, ANY_ID), - .revn = 305, - .name = "A305", - .pm4fw = "a300_pm4.fw", - .pfpfw = "a300_pfp.fw", - .gmem = SZ_256K, - }, { - .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID), - .revn = 320, - .name = "A320", - .pm4fw = "a300_pm4.fw", - .pfpfw = "a300_pfp.fw", - .gmem = SZ_512K, - }, { - .rev = ADRENO_REV(3, 3, 0, ANY_ID), - .revn = 330, - .name = "A330", - .pm4fw = "a330_pm4.fw", - .pfpfw = "a330_pfp.fw", - .gmem = SZ_1M, - }, -}; - -MODULE_FIRMWARE("a300_pm4.fw"); -MODULE_FIRMWARE("a300_pfp.fw"); -MODULE_FIRMWARE("a330_pm4.fw"); -MODULE_FIRMWARE("a330_pfp.fw"); - #define RB_SIZE SZ_32K #define RB_BLKSIZE 16 @@ -304,42 +264,17 @@ static const char *iommu_ports[] = { "gfx3d1_user", "gfx3d1_priv", }; -static inline bool _rev_match(uint8_t entry, uint8_t id) -{ - return (entry == ANY_ID) || (entry == id); -} - int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs, struct adreno_rev rev) { struct msm_mmu *mmu; - int i, ret; - - /* identify gpu: */ - for (i = 0; i < ARRAY_SIZE(gpulist); i++) { - const struct adreno_info *info = &gpulist[i]; - if (_rev_match(info->rev.core, rev.core) && - _rev_match(info->rev.major, rev.major) && - _rev_match(info->rev.minor, rev.minor) && - _rev_match(info->rev.patchid, rev.patchid)) { - gpu->info = info; - gpu->revn = info->revn; - break; - } - } - - if (i == ARRAY_SIZE(gpulist)) { - dev_err(drm->dev, "Unknown GPU revision: %u.%u.%u.%u\n", - rev.core, rev.major, rev.minor, rev.patchid); - return -ENXIO; - } - - DBG("Found GPU: %s (%u.%u.%u.%u)", gpu->info->name, - rev.core, rev.major, rev.minor, rev.patchid); + int ret; gpu->funcs = funcs; + gpu->info = adreno_info(rev); gpu->gmem = gpu->info->gmem; + gpu->revn = gpu->info->revn; gpu->rev = rev; ret = request_firmware(&gpu->pm4, gpu->info->pm4fw, drm->dev); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 63c36ce33020..a1e1fbb1f509 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -39,7 +39,16 @@ struct adreno_gpu_funcs { struct msm_gpu_funcs base; }; -struct adreno_info; +struct adreno_info { + struct adreno_rev rev; + uint32_t revn; + const char *name; + const char *pm4fw, *pfpfw; + uint32_t gmem; + struct msm_gpu *(*init)(struct drm_device *dev); +}; + +const struct adreno_info *adreno_info(struct adreno_rev rev); struct adreno_rbmemptrs { volatile uint32_t rptr; diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 7008900e6b29..307d52d4ece8 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -315,39 +315,12 @@ static void load_gpu(struct drm_device *dev) { static DEFINE_MUTEX(init_lock); struct msm_drm_private *priv = dev->dev_private; - struct msm_gpu *gpu; mutex_lock(&init_lock); - if (priv->gpu) - goto out; - - gpu = a3xx_gpu_init(dev); - if (IS_ERR(gpu)) { - dev_warn(dev->dev, "failed to load a3xx gpu\n"); - gpu = NULL; - /* not fatal */ - } - - if (gpu) { - int ret; - mutex_lock(&dev->struct_mutex); - gpu->funcs->pm_resume(gpu); - mutex_unlock(&dev->struct_mutex); - ret = gpu->funcs->hw_init(gpu); - if (ret) { - dev_err(dev->dev, "gpu hw init failed: %d\n", ret); - gpu->funcs->destroy(gpu); - gpu = NULL; - } else { - /* give inactive pm a chance to kick in: */ - msm_gpu_retire(gpu); - } - } - - priv->gpu = gpu; + if (!priv->gpu) + priv->gpu = adreno_load_gpu(dev); -out: mutex_unlock(&init_lock); } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 38ef033c81f3..fd1e4b4a6d40 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -166,7 +166,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, const char *name, const char *ioname, const char *irqname, int ringsz); void msm_gpu_cleanup(struct msm_gpu *gpu); -struct msm_gpu *a3xx_gpu_init(struct drm_device *dev); +struct msm_gpu *adreno_load_gpu(struct drm_device *dev); void __init adreno_register(void); void __exit adreno_unregister(void); |