diff options
| author | Magnus Damm <damm@opensource.se> | 2011-09-28 11:50:58 +0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2011-10-28 10:03:52 +0400 |
| commit | ad2a8e7ea4128af984a98537b1b9484722b6b4bb (patch) | |
| tree | cf5030dda233a9182e78574356d1853652753aad /drivers | |
| parent | cf8e56bf5b60dba5ba11db83ca7f1df884e568e5 (diff) | |
| download | linux-ad2a8e7ea4128af984a98537b1b9484722b6b4bb.tar.xz | |
sh: pfc: Add GPIO IRQ support
Add GPIO IRQ support to the shared PFC code in drivers/sh/pfc.c
The enums pointed out by a certain GPIO will be matched against
a table for IRQ to enum mappings.
Only the shared PFC code is updated by this patch. SoC specific
changes are also needed to allow platforms to make use of this
feature.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/sh/pfc.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c index de5e3d65a6fa..e67fe170d8d5 100644 --- a/drivers/sh/pfc.c +++ b/drivers/sh/pfc.c @@ -577,6 +577,32 @@ static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value) sh_gpio_set_value(chip_to_pinmux(chip), offset, value); } +static int sh_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct pinmux_info *gpioc = chip_to_pinmux(chip); + pinmux_enum_t enum_id; + pinmux_enum_t *enum_ids; + int i, k, pos; + + pos = 0; + enum_id = 0; + while (1) { + pos = get_gpio_enum_id(gpioc, offset, pos, &enum_id); + if (pos <= 0 || !enum_id) + break; + + for (i = 0; i < gpioc->gpio_irq_size; i++) { + enum_ids = gpioc->gpio_irq[i].enum_ids; + for (k = 0; enum_ids[k]; k++) { + if (enum_ids[k] == enum_id) + return gpioc->gpio_irq[i].irq; + } + } + } + + return -ENOSYS; +} + int register_pinmux(struct pinmux_info *pip) { struct gpio_chip *chip = &pip->chip; @@ -592,6 +618,7 @@ int register_pinmux(struct pinmux_info *pip) chip->get = sh_gpio_get; chip->direction_output = sh_gpio_direction_output; chip->set = sh_gpio_set; + chip->to_irq = sh_gpio_to_irq; WARN_ON(pip->first_gpio != 0); /* needs testing */ |