diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2018-01-29 06:26:35 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2018-02-27 19:15:19 +0300 |
| commit | 4a7093b914aaee8d6fd7da75789a075745bc2d29 (patch) | |
| tree | 85418daa420910ede765a0215c8cd64a66ef5ff0 /drivers | |
| parent | 5f380ceff5f5c84039cd399120c5cb11f39376a8 (diff) | |
| download | linux-4a7093b914aaee8d6fd7da75789a075745bc2d29.tar.xz | |
rtlwifi: Extend tx_power_by_rate_offset size for newer IC
In older design, the TX power is grouped into rate section (smaller array
size), but new design groups them into rate (larger array size). Thus,
we extend the size for both cases, and add compile time assertion.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Acked-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/wireless/realtek/rtlwifi/base.c | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/realtek/rtlwifi/wifi.h | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/wireless/realtek/rtlwifi/base.c b/drivers/net/wireless/realtek/rtlwifi/base.c index 92f99a303920..c000c85a3ded 100644 --- a/drivers/net/wireless/realtek/rtlwifi/base.c +++ b/drivers/net/wireless/realtek/rtlwifi/base.c @@ -2646,6 +2646,8 @@ EXPORT_SYMBOL_GPL(rtl_global_var); static int __init rtl_core_module_init(void) { + BUILD_BUG_ON(TX_PWR_BY_RATE_NUM_RATE < TX_PWR_BY_RATE_NUM_SECTION); + if (rtl_rate_control_register()) pr_err("rtl: Unable to register rtl_rc, use default RC !!\n"); diff --git a/drivers/net/wireless/realtek/rtlwifi/wifi.h b/drivers/net/wireless/realtek/rtlwifi/wifi.h index 31ef9f72bef1..29c1289ad6b2 100644 --- a/drivers/net/wireless/realtek/rtlwifi/wifi.h +++ b/drivers/net/wireless/realtek/rtlwifi/wifi.h @@ -174,6 +174,7 @@ enum rtl8192c_h2c_cmd { #define TX_PWR_BY_RATE_NUM_BAND 2 #define TX_PWR_BY_RATE_NUM_RF 4 #define TX_PWR_BY_RATE_NUM_SECTION 12 +#define TX_PWR_BY_RATE_NUM_RATE 84 /* >= TX_PWR_BY_RATE_NUM_SECTION */ #define MAX_BASE_NUM_IN_PHY_REG_PG_24G 6 #define MAX_BASE_NUM_IN_PHY_REG_PG_5G 5 @@ -1286,7 +1287,7 @@ struct rtl_phy { u32 tx_power_by_rate_offset[TX_PWR_BY_RATE_NUM_BAND] [TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RF] - [TX_PWR_BY_RATE_NUM_SECTION]; + [TX_PWR_BY_RATE_NUM_RATE]; u8 txpwr_by_rate_base_24g[TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RF] [MAX_BASE_NUM_IN_PHY_REG_PG_24G]; |