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authorshenwei.wang@nxp.com <shenwei.wang@nxp.com>2018-06-08 22:22:35 +0300
committerThierry Reding <thierry.reding@gmail.com>2018-07-09 20:06:21 +0300
commitdb6c51ab156a2ec29edff41b1ebc1fe7d04a9614 (patch)
tree9ead980e09f479c2cdf72135d3d4bd85f80af7c8 /drivers/xen/acpi.c
parent82a9c55a2bb0a47b16c75e93d8ce54e8944758c0 (diff)
downloadlinux-db6c51ab156a2ec29edff41b1ebc1fe7d04a9614.tar.xz
pwm: fsl-ftm: Added the support of per-compatible data
On the i.MX8x SoC family, an additional PWM enable bit is added for each PWM channel in the register FTM_SC[23:16]. It supports 8 channels. Bit 16 is for channel 0, and bit 23 is for channel 7. As the IP version information can not be obtained via any of the FTM registers, a property of "has_enable_bits" is added via per-compatible data structure. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/xen/acpi.c')
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