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| author | Ajay Kumar <ajaykumar.rs@samsung.com> | 2012-11-05 11:47:00 +0400 |
|---|---|---|
| committer | Jingoo Han <jg1.han@samsung.com> | 2012-11-29 05:33:28 +0400 |
| commit | 2f85f97e460a4bcfad678151fcc13dbf0b8181b3 (patch) | |
| tree | 3a0f87511387925ff9ad5f502f1edfce821d468d /drivers/video/exynos/exynos_dp_reg.c | |
| parent | 22ce19cb43e2df5b0b17159e94244d1151ea250b (diff) | |
| download | linux-2f85f97e460a4bcfad678151fcc13dbf0b8181b3.tar.xz | |
video: exynos_dp: Fix incorrect setting for INT_CTL
INT_CTL register contains bits INT_POL0 and INT_POL1, and not INT_POL.
This patch fixes the wrong register setting for INT_CTL.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Diffstat (limited to 'drivers/video/exynos/exynos_dp_reg.c')
| -rw-r--r-- | drivers/video/exynos/exynos_dp_reg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c index 9fb901bcdd59..93b4b6bb796c 100644 --- a/drivers/video/exynos/exynos_dp_reg.c +++ b/drivers/video/exynos/exynos_dp_reg.c @@ -88,7 +88,7 @@ void exynos_dp_init_analog_param(struct exynos_dp_device *dp) void exynos_dp_init_interrupt(struct exynos_dp_device *dp) { /* Set interrupt pin assertion polarity as high */ - writel(INT_POL, dp->reg_base + EXYNOS_DP_INT_CTL); + writel(INT_POL1 | INT_POL0, dp->reg_base + EXYNOS_DP_INT_CTL); /* Clear pending regisers */ writel(0xff, dp->reg_base + EXYNOS_DP_COMMON_INT_STA_1); |