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| author | Lee Jones <lee.jones@linaro.org> | 2019-06-17 15:51:03 +0300 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2019-06-18 11:58:29 +0300 |
| commit | 2bc02355f8ba2c1f108ec8b16a673b467a17228c (patch) | |
| tree | 6e6ddd5b886fab6550b595f81d84690b1105ef59 /drivers/usb/dwc3/Kconfig | |
| parent | 8bc529b25354d4ed1dcd3d3663ada5775e7acaec (diff) | |
| download | linux-2bc02355f8ba2c1f108ec8b16a673b467a17228c.tar.xz | |
usb: dwc3: qcom: Add support for booting with ACPI
In Linux, the DWC3 core exists as its own independent platform device.
Thus when describing relationships in Device Tree, the current default
boot configuration table option, the DWC3 core often resides as a child
of the platform specific node. Both of which are given their own
address space descriptions and the drivers can be mostly agnostic to
each other.
However, other Operating Systems have taken a more monolithic approach,
which is evident in the configuration ACPI tables for the Qualcomm
Snapdragon SDM850, where all DWC3 (core and platform) components are
described under a single IO memory region.
To ensure successful booting using the supplied ACPI tables, we need to
devise a way to chop up the address regions provided and subsequently
register the DWC3 core with the resultant information, which is
precisely what this patch aims to achieve.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc3/Kconfig')
| -rw-r--r-- | drivers/usb/dwc3/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 4a62045cc812..89abc6078703 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -128,7 +128,7 @@ config USB_DWC3_QCOM tristate "Qualcomm Platform" depends on ARCH_QCOM || COMPILE_TEST depends on EXTCON || !EXTCON - depends on OF + depends on (OF || ACPI) default USB_DWC3 help Some Qualcomm SoCs use DesignWare Core IP for USB2/3 |