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| author | Bjorn Helgaas <bhelgaas@google.com> | 2017-11-14 21:11:36 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-11-14 21:11:36 +0300 |
| commit | 29d0d4411fafa1a934ff6ff00840df4f880add41 (patch) | |
| tree | 749277ae8b4a8a90fdd978cf37986e5072a30ca2 /drivers/pci | |
| parent | d238be6957b2e57913f602fc4429813ca6027e93 (diff) | |
| parent | 33ba90aa4d4432b884fc0ed57ba9dc12eb8fa288 (diff) | |
| download | linux-29d0d4411fafa1a934ff6ff00840df4f880add41.tar.xz | |
Merge branch 'pci/host-thunder' into next
* pci/host-thunder:
PCI: Avoid slot reset if bridge itself is broken
PCI: Avoid bus reset if bridge itself is broken
PCI: Mark Cavium CN8xxx to avoid bus reset
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci.c | 8 | ||||
| -rw-r--r-- | drivers/pci/quirks.c | 7 |
2 files changed, 15 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 50f148f154ab..b03e91aa8fec 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4436,6 +4436,10 @@ static bool pci_bus_resetable(struct pci_bus *bus) { struct pci_dev *dev; + + if (bus->self && (bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET)) + return false; + list_for_each_entry(dev, &bus->devices, bus_list) { if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || (dev->subordinate && !pci_bus_resetable(dev->subordinate))) @@ -4500,6 +4504,10 @@ static bool pci_slot_resetable(struct pci_slot *slot) { struct pci_dev *dev; + if (slot->bus->self && + (slot->bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET)) + return false; + list_for_each_entry(dev, &slot->bus->devices, bus_list) { if (!dev->slot || dev->slot != slot) continue; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index cbe85e921ede..cb89ff5f9cb4 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3365,6 +3365,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); +/* + * Root port on some Cavium CN8xxx chips do not successfully complete a bus + * reset when used with certain child devices. After the reset, config + * accesses to the child may fail. + */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset); + static void quirk_no_pm_reset(struct pci_dev *dev) { /* |