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authorBjorn Helgaas <bhelgaas@google.com>2018-06-07 00:10:05 +0300
committerBjorn Helgaas <bhelgaas@google.com>2018-06-07 00:10:05 +0300
commit08b5b2f7831a5378434bd8cc19e9239f3a3b6134 (patch)
tree1551044a0af2fee3233e3578fb000604a27d0ae1 /drivers/pci/pcie
parentd7e02c08a93bbd3da1f3fd98d164c9b69a072b3a (diff)
parentaf8bb9f89838249872240f258e67774ccbcc5970 (diff)
downloadlinux-08b5b2f7831a5378434bd8cc19e9239f3a3b6134.tar.xz
Merge branch 'pci/aspm'
- disable ASPM L1.2 substate if we don't have LTR (Bjorn Helgaas) - respect platform ownership of LTR (Bjorn Helgaas) * pci/aspm: PCI/ACPI: Request LTR control from platform before using it PCI/ASPM: Disable ASPM L1.2 Substate if we don't have LTR
Diffstat (limited to 'drivers/pci/pcie')
-rw-r--r--drivers/pci/pcie/aspm.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index f76eb7704f64..c687c817b47d 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -400,6 +400,15 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev,
info->l1ss_cap = 0;
return;
}
+
+ /*
+ * If we don't have LTR for the entire path from the Root Complex
+ * to this device, we can't use ASPM L1.2 because it relies on the
+ * LTR_L1.2_THRESHOLD. See PCIe r4.0, secs 5.5.4, 6.18.
+ */
+ if (!pdev->ltr_path)
+ info->l1ss_cap &= ~PCI_L1SS_CAP_ASPM_L1_2;
+
pci_read_config_dword(pdev, info->l1ss_cap_ptr + PCI_L1SS_CTL1,
&info->l1ss_ctl1);
pci_read_config_dword(pdev, info->l1ss_cap_ptr + PCI_L1SS_CTL2,