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authorBjorn Helgaas <bhelgaas@google.com>2018-06-07 00:10:27 +0300
committerBjorn Helgaas <bhelgaas@google.com>2018-06-07 00:10:27 +0300
commitf03c7aa4598b78f9f0f6883f1e410f67968f74b9 (patch)
treeb474423af26a7c20838e795fc39bc8795d24cf75 /drivers/pci/pci.h
parentbdc4bb13773955d33f8fd23d79afbc95fda8dca4 (diff)
parent854b69efbdd2903991506ac5d5624d2cfb5b4e2f (diff)
downloadlinux-f03c7aa4598b78f9f0f6883f1e410f67968f74b9.tar.xz
Merge branch 'lorenzo/pci/dwc'
- reduce Keystone "link already up" log level (Fabio Estevam) - move private DT functions to drivers/pci/ (Rob Herring) - factor out dwc CONFIG_PCI Kconfig dependencies (Rob Herring) - add DesignWare support to the endpoint test driver (Gustavo Pimentel) - add DesignWare support for endpoint mode (Gustavo Pimentel) - use devm_ioremap_resource() instead of devm_ioremap() in dra7xx and artpec6 (Gustavo Pimentel) - fix Qualcomm bitwise NOT issue (Dan Carpenter) - add Qualcomm runtime PM support (Srinivas Kandagatla) * lorenzo/pci/dwc: PCI: qcom: add runtime pm support to pcie_port PCI: qcom: Fix a bitwise vs logical NOT typo PCI: dwc: dra7xx: Use devm_ioremap_resource() instead of devm_ioremap() PCI: dwc: artpec6: Use devm_ioremap_resource() instead of devm_ioremap() misc: pci_endpoint_test: Add DesignWare EP entry dt-bindings: PCI: designware: Add support for EP in DesignWare driver PCI: dwc: Add support for EP mode dt-bindings: PCI: designware: Example update PCI: Move private DT related functions into private header PCI: dwc: Move CONFIG_PCI depends to menu PCI: dwc: Replace magic number by defines PCI: dwc: Small computation improvement PCI: dwc: Replace lower into upper case characters PCI: dwc: Define maximum number of vectors PCI: imx6: Remove space before tabs PCI: keystone: Do not treat link up message as error # Conflicts: # include/linux/of_pci.h
Diffstat (limited to 'drivers/pci/pci.h')
-rw-r--r--drivers/pci/pci.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 6af75952cac7..c358e7a07f3f 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -412,4 +412,44 @@ static inline u64 pci_rebar_size_to_bytes(int size)
return 1ULL << (size + 20);
}
+struct device_node;
+
+#ifdef CONFIG_OF
+int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
+int of_get_pci_domain_nr(struct device_node *node);
+int of_pci_get_max_link_speed(struct device_node *node);
+
+#else
+static inline int
+of_pci_parse_bus_range(struct device_node *node, struct resource *res)
+{
+ return -EINVAL;
+}
+
+static inline int
+of_get_pci_domain_nr(struct device_node *node)
+{
+ return -1;
+}
+
+static inline int
+of_pci_get_max_link_speed(struct device_node *node)
+{
+ return -EINVAL;
+}
+#endif /* CONFIG_OF */
+
+#if defined(CONFIG_OF_ADDRESS)
+int devm_of_pci_get_host_bridge_resources(struct device *dev,
+ unsigned char busno, unsigned char bus_max,
+ struct list_head *resources, resource_size_t *io_base);
+#else
+static inline int devm_of_pci_get_host_bridge_resources(struct device *dev,
+ unsigned char busno, unsigned char bus_max,
+ struct list_head *resources, resource_size_t *io_base)
+{
+ return -EINVAL;
+}
+#endif
+
#endif /* DRIVERS_PCI_H */