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authorKishon Vijay Abraham I <kishon@ti.com>2017-02-15 16:18:18 +0300
committerBjorn Helgaas <bhelgaas@google.com>2017-02-22 00:00:26 +0300
commita0560209f10cb55fbfcdd11ef85cfb444f8bea89 (patch)
treef3ccfe94e4c080a785806a7c74ac5da3a8dce903 /drivers/pci/dwc/pcie-designware.h
parentfeb85d9b1c47ea8dbcae559ff127b433fdb245b7 (diff)
downloadlinux-a0560209f10cb55fbfcdd11ef85cfb444f8bea89.tar.xz
PCI: dwc: Add CONFIG_PCIE_DW_HOST to enable PCI dwc host
Now that PCI designware host has a separate file, add a new PCIE_DW_HOST config symbol to select the host-only driver. This will enable to independently select host support and endpoint support (when it's added). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/dwc/pcie-designware.h')
-rw-r--r--drivers/pci/dwc/pcie-designware.h29
1 files changed, 25 insertions, 4 deletions
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index 30547708f18e..cd3b8713fe50 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -161,10 +161,6 @@ struct dw_pcie {
int dw_pcie_read(void __iomem *addr, int size, u32 *val);
int dw_pcie_write(void __iomem *addr, int size, u32 val);
-irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
-void dw_pcie_msi_init(struct pcie_port *pp);
-void dw_pcie_setup_rc(struct pcie_port *pp);
-int dw_pcie_host_init(struct pcie_port *pp);
u32 dw_pcie_readl_dbi(struct dw_pcie *pci, u32 reg);
void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val);
@@ -174,4 +170,29 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
int type, u64 cpu_addr, u64 pci_addr,
u32 size);
void dw_pcie_setup(struct dw_pcie *pci);
+
+#ifdef CONFIG_PCIE_DW_HOST
+irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
+void dw_pcie_msi_init(struct pcie_port *pp);
+void dw_pcie_setup_rc(struct pcie_port *pp);
+int dw_pcie_host_init(struct pcie_port *pp);
+#else
+static inline irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
+{
+ return IRQ_NONE;
+}
+
+static inline void dw_pcie_msi_init(struct pcie_port *pp)
+{
+}
+
+static inline void dw_pcie_setup_rc(struct pcie_port *pp)
+{
+}
+
+static inline int dw_pcie_host_init(struct pcie_port *pp)
+{
+ return 0;
+}
+#endif
#endif /* _PCIE_DESIGNWARE_H */