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authorNicolai Hähnle <nicolai.haehnle@amd.com>2018-04-12 17:34:19 +0300
committerAlex Deucher <alexander.deucher@amd.com>2018-04-25 06:19:57 +0300
commit75569c182e4f65cd8826a5853dc9cbca703cbd0e (patch)
treeb708625a4b942dbae4028c465076a18006faa070 /drivers/of
parent221bda4b5f1abfd74159d7bf3703affa62468030 (diff)
downloadlinux-75569c182e4f65cd8826a5853dc9cbca703cbd0e.tar.xz
drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders
Otherwise, the SQ may skip some of the register writes, or shader waves may be allocated where we don't expect them, so that as a result we don't actually reset all of the register SRAMs. This can lead to spurious ECC errors later on if a shader uses an uninitialized register. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/of')
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