diff options
| author | Golan Ben Ami <golan.ben.ami@intel.com> | 2017-10-22 15:58:26 +0300 |
|---|---|---|
| committer | Luca Coelho <luciano.coelho@intel.com> | 2018-04-26 15:18:07 +0300 |
| commit | a8cbb46f831d2c101feccdd0e0daf3627b8c1dca (patch) | |
| tree | 2f3d7499530ad0e45e31f2a4abbf74225e40fa9e /drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c | |
| parent | 0ddcf3e76ae4d02918e609342a1020b50258fadd (diff) | |
| download | linux-a8cbb46f831d2c101feccdd0e0daf3627b8c1dca.tar.xz | |
iwlwifi: allow different csr flags for different device families
Different device families may have different flag values
for passing a message to the fw (i.e. SW_RESET).
In order to keep the code readable, and avoid conditioning
upon the family, store a value for each flag, which indicates
the bit that needs to be enabled.
Signed-off-by: Golan Ben Ami <golan.ben.ami@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Diffstat (limited to 'drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c')
| -rw-r--r-- | drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c index f2cea1c7befc..ac965c34a2f8 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c @@ -6,6 +6,7 @@ * GPL LICENSE SUMMARY * * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. + * Copyright(c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as @@ -31,6 +32,7 @@ * BSD LICENSE * * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. + * Copyright(c) 2018 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -199,12 +201,12 @@ static int iwl_init_otp_access(struct iwl_trans *trans) /* Enable 40MHz radio clock */ iwl_write32(trans, CSR_GP_CNTRL, iwl_read32(trans, CSR_GP_CNTRL) | - CSR_GP_CNTRL_REG_FLAG_INIT_DONE); + BIT(trans->cfg->csr->flag_init_done)); /* wait for clock to be ready */ ret = iwl_poll_bit(trans, CSR_GP_CNTRL, - CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, - CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, + BIT(trans->cfg->csr->flag_mac_clock_ready), + BIT(trans->cfg->csr->flag_mac_clock_ready), 25000); if (ret < 0) { IWL_ERR(trans, "Time out access OTP\n"); |