diff options
| author | Stefano Brivio <stefano.brivio@polimi.it> | 2008-01-23 16:48:50 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-02-01 06:26:37 +0300 |
| commit | e78c9d285709f535caae405f1da5b2936f51f0b5 (patch) | |
| tree | 13840f98a004920dd8e93e8fe2c16d8b51b59e8f /drivers/net/wireless/b43legacy/phy.c | |
| parent | 8712f2769dd66d8e7ff179d525b93e0a15a5b963 (diff) | |
| download | linux-e78c9d285709f535caae405f1da5b2936f51f0b5.tar.xz | |
b43legacy: fix MAC control and microcode init
This zeros out all microcode related memory before loading
the microcode.
This also fixes initialization of the MAC control register.
The _only_ place where we overwrite the contents of the MAC control
register is at the beginning of b43_chip_init().
All other places must do read() -> mask/set -> write() to not
overwrite existing bits.
This also adds a longer delay for waiting for the microcode
to initialize itself. It seems that the current timeout is sufficient
on all available devices, but there's no real reason why we shouldn't
wait for up to one second. Slow embedded devices might exist.
Better safe than sorry.
While at it, fix naming of MACCTL values.
This patch by Michael Buesch has been ported to b43legacy.
Signed-off-by: Stefano Brivio <stefano.brivio@polimi.it>
Acked-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/wireless/b43legacy/phy.c')
| -rw-r--r-- | drivers/net/wireless/b43legacy/phy.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c index c16febbdbf5d..8e5c09b81871 100644 --- a/drivers/net/wireless/b43legacy/phy.c +++ b/drivers/net/wireless/b43legacy/phy.c @@ -140,7 +140,7 @@ void b43legacy_phy_calibrate(struct b43legacy_wldev *dev) { struct b43legacy_phy *phy = &dev->phy; - b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); /* Dummy read. */ + b43legacy_read32(dev, B43legacy_MMIO_MACCTL); /* Dummy read. */ if (phy->calibrated) return; if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) { @@ -2231,16 +2231,16 @@ bit26 = 1; * or the latest PS-Poll packet sent was successful, * set bit26 */ } - status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); + status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); if (bit25) - status |= B43legacy_SBF_PS1; + status |= B43legacy_MACCTL_HWPS; else - status &= ~B43legacy_SBF_PS1; + status &= ~B43legacy_MACCTL_HWPS; if (bit26) - status |= B43legacy_SBF_PS2; + status |= B43legacy_MACCTL_AWAKE; else - status &= ~B43legacy_SBF_PS2; - b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); + status &= ~B43legacy_MACCTL_AWAKE; + b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); if (bit26 && dev->dev->id.revision >= 5) { for (i = 0; i < 100; i++) { if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, |