diff options
| author | Bartosz Markowski <bartosz.markowski@tieto.com> | 2013-08-07 17:17:45 +0400 |
|---|---|---|
| committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2013-08-12 18:21:38 +0400 |
| commit | 57a8930aecb641b7cfabd199c2c998b13894ba74 (patch) | |
| tree | abfac2cc192f29dad569508d5d7fdfe87e92eef1 /drivers/net/wireless/ath/ath10k/pci.h | |
| parent | c69029b179592b5bb6da3c356236b362055284a4 (diff) | |
| download | linux-57a8930aecb641b7cfabd199c2c998b13894ba74.tar.xz | |
ath10k: Remove qca98xx hw1.0 support
Since the firmware support is no longer available for hw1.0,
drop all code (especially workarounds) for those units.
Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/pci.h | 23 |
1 files changed, 2 insertions, 21 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h index 871bb339d56d..b2439f59a52f 100644 --- a/drivers/net/wireless/ath/ath10k/pci.h +++ b/drivers/net/wireless/ath/ath10k/pci.h @@ -152,8 +152,7 @@ struct service_to_pipe { enum ath10k_pci_features { ATH10K_PCI_FEATURE_MSI_X = 0, - ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND = 1, - ATH10K_PCI_FEATURE_SOC_POWER_SAVE = 2, + ATH10K_PCI_FEATURE_SOC_POWER_SAVE = 1, /* keep last */ ATH10K_PCI_FEATURE_COUNT @@ -234,9 +233,6 @@ struct ath10k_pci { /* Map CE id to ce_state */ struct ce_state *ce_id_to_state[CE_COUNT_MAX]; - - /* makes sure that dummy reads are atomic */ - spinlock_t hw_v1_workaround_lock; }; static inline struct ath10k_pci *ath10k_pci_priv(struct ath10k *ar) @@ -310,23 +306,8 @@ static inline void ath10k_pci_write32(struct ath10k *ar, u32 offset, u32 value) { struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); - void __iomem *addr = ar_pci->mem; - - if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features)) { - unsigned long irq_flags; - - spin_lock_irqsave(&ar_pci->hw_v1_workaround_lock, irq_flags); - - ioread32(addr+offset+4); /* 3rd read prior to write */ - ioread32(addr+offset+4); /* 2nd read prior to write */ - ioread32(addr+offset+4); /* 1st read prior to write */ - iowrite32(value, addr+offset); - spin_unlock_irqrestore(&ar_pci->hw_v1_workaround_lock, - irq_flags); - } else { - iowrite32(value, addr+offset); - } + iowrite32(value, ar_pci->mem + offset); } static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset) |