diff options
| author | Rasmus Villemoes <rasmus.villemoes@prevas.dk> | 2019-06-04 10:34:23 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-06-05 06:07:56 +0300 |
| commit | df63b0d95ec59f47df3a8beaeb75557c4bc49c00 (patch) | |
| tree | a3a2e01270039ee55eb2c34bf92916b3a8ee8269 /drivers/net/dsa/mv88e6xxx/global1.c | |
| parent | 3dd7400b419409b1551f7f01764b1f3160feda90 (diff) | |
| download | linux-df63b0d95ec59f47df3a8beaeb75557c4bc49c00.tar.xz | |
net: dsa: mv88e6xxx: add mv88e6250_g1_ieee_pri_map
Quite a few of the existing supported chips that use
mv88e6085_g1_ieee_pri_map as ->ieee_pri_map (including, incidentally,
mv88e6085 itself) actually have a reset value of 0xfa50 in the
G1_IEEE_PRI register.
The data sheet for the mv88e6095, however, does describe a reset value
of 0xfa41.
So rather than changing the value in the existing callback, introduce
a new variant with the 0xfa50 value. That will be used by the upcoming
mv88e6250, and existing chips can be switched over one by one,
preferably double-checking both the data sheet and actual hardware in
each case - if anybody actually feels this is important enough to
care.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/global1.c')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/global1.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c index 770c03406033..c851b7b532a4 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.c +++ b/drivers/net/dsa/mv88e6xxx/global1.c @@ -299,6 +299,12 @@ int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip) return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41); } +int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip) +{ + /* Reset the IEEE Tag priorities to defaults */ + return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa50); +} + /* Offset 0x1a: Monitor Control */ /* Offset 0x1a: Monitor & MGMT Control on some devices */ |