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authorSujoy Ray <sujoy.ray@intel.com>2022-05-04 21:01:19 +0300
committerSujoy Ray <sujoy.ray@intel.com>2022-05-12 17:46:40 +0300
commitefe6d9649b1d6b85b50cef64745df2e6749a8a45 (patch)
treee9aca55fa1fa29fea638ee52832fa9691fdd6f02 /drivers/mmc/host/sdhci-xenon.c
parentab95859fee776e58934d2b0cc1f4e93810e66508 (diff)
parent49caedb668e476c100d727f2174724e0610a2b92 (diff)
downloadlinux-efe6d9649b1d6b85b50cef64745df2e6749a8a45.tar.xz
Merge commit '49caedb668e476c100d727f2174724e0610a2b92' of https://github.com/openbmc/linux into openbmc/dev-5.15-intel-bump_v5.15.36
Signed-off-by: Sujoy Ray <sujoy.ray@intel.com>
Diffstat (limited to 'drivers/mmc/host/sdhci-xenon.c')
-rw-r--r--drivers/mmc/host/sdhci-xenon.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c
index 666cee4c7f7c..08e838400b52 100644
--- a/drivers/mmc/host/sdhci-xenon.c
+++ b/drivers/mmc/host/sdhci-xenon.c
@@ -241,16 +241,6 @@ static void xenon_voltage_switch(struct sdhci_host *host)
{
/* Wait for 5ms after set 1.8V signal enable bit */
usleep_range(5000, 5500);
-
- /*
- * For some reason the controller's Host Control2 register reports
- * the bit representing 1.8V signaling as 0 when read after it was
- * written as 1. Subsequent read reports 1.
- *
- * Since this may cause some issues, do an empty read of the Host
- * Control2 register here to circumvent this.
- */
- sdhci_readw(host, SDHCI_HOST_CONTROL2);
}
static unsigned int xenon_get_max_clock(struct sdhci_host *host)