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authorAlexander Usyskin <alexander.usyskin@intel.com>2015-08-02 22:20:52 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-08-04 03:33:54 +0300
commit1fa55b4e0e161b3d16b52f5bab1b39b39607bc27 (patch)
treebe74705f98e7de456914050cbe13ac11cd4af7d3 /drivers/misc/mei/hw-me.h
parentbb9f4d26dda7d2a875cadc0f7eedee3d65d3d1f5 (diff)
downloadlinux-1fa55b4e0e161b3d16b52f5bab1b39b39607bc27.tar.xz
mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable intr_source to save the interrupt causes for further dispatching. The interrupt cause is saved in the irq quick handler to achieve unified behavior for both MSI enabled and shared interrupt platforms. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/mei/hw-me.h')
-rw-r--r--drivers/misc/mei/hw-me.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h
index cf64847a35b9..2ee14dc1b2ea 100644
--- a/drivers/misc/mei/hw-me.h
+++ b/drivers/misc/mei/hw-me.h
@@ -51,12 +51,14 @@ struct mei_cfg {
*
* @cfg: per device generation config and ops
* @mem_addr: io memory address
+ * @intr_source: interrupt source
* @pg_state: power gating state
* @d0i3_supported: di03 support
*/
struct mei_me_hw {
const struct mei_cfg *cfg;
void __iomem *mem_addr;
+ u32 intr_source;
enum mei_pg_state pg_state;
bool d0i3_supported;
};