diff options
| author | Omer Shpigelman <oshpigelman@habana.ai> | 2019-02-28 11:46:11 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-02-28 15:04:59 +0300 |
| commit | 27ca384cb7c44b8b16ea43f9aed930664140360e (patch) | |
| tree | 9a8852fd2c48a5844dedf6799ec48d2473c70872 /drivers/misc/habanalabs/include | |
| parent | 60b7dcca4570817cc0244a8487246d6899407b44 (diff) | |
| download | linux-27ca384cb7c44b8b16ea43f9aed930664140360e.tar.xz | |
habanalabs: add MMU DRAM default page mapping
This patch provides a workaround for a H/W bug in Goya, where access to
RAZWI from TPC can cause PCI completion timeout.
The WA is to use the device MMU to map any unmapped DRAM memory to a
default page in the DRAM. That way, the TPC will never reach RAZWI upon
accessing a bad address in the DRAM.
When a DRAM page is mapped by the user, its default mapping is
overwritten. Once that page is unmapped, the MMU driver will map that page
to the default page.
To help debugging, the driver will set the default page area to 0x99 on
device initialization.
Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/habanalabs/include')
| -rw-r--r-- | drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h b/drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h index 1bc36aba1426..b680052ee3f0 100644 --- a/drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h +++ b/drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h @@ -36,6 +36,7 @@ #define HL_PTE_SIZE sizeof(u64) #define HOP_TABLE_SIZE PAGE_SIZE_4KB +#define PTE_ENTRIES_IN_HOP (HOP_TABLE_SIZE / HL_PTE_SIZE) #define HOP0_TABLES_TOTAL_SIZE (HOP_TABLE_SIZE * MAX_ASID) #define MMU_HOP0_PA43_12_SHIFT 12 |