diff options
| author | Hans Verkuil <hverkuil@xs4all.nl> | 2015-07-17 14:45:22 +0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2015-07-22 17:04:57 +0300 |
| commit | 55b858b4e5f46e71f9e5089cb63602697a49a211 (patch) | |
| tree | 8def135423e41bbed9019dde2986a1cfc5153089 /drivers/media/pci/cobalt/cobalt-driver.c | |
| parent | 810c168c233fc531ecd3e7a6d9e0b5a3ffe85da7 (diff) | |
| download | linux-55b858b4e5f46e71f9e5089cb63602697a49a211.tar.xz | |
[media] cobalt: allow fewer than 8 PCIe lanes
Currently the cobalt driver refuses to load if fewer than 8 PCIe lanes
are assigned. This patch changes this and just issues a warning. The
only time it will refuse to load is if the number of assigned lanes is less
than what the PCIe host is capable of since this suggests that the card
isn't seated correctly in the slot.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/pci/cobalt/cobalt-driver.c')
| -rw-r--r-- | drivers/media/pci/cobalt/cobalt-driver.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/media/pci/cobalt/cobalt-driver.c b/drivers/media/pci/cobalt/cobalt-driver.c index b994b8efdc99..8fed61ec712e 100644 --- a/drivers/media/pci/cobalt/cobalt-driver.c +++ b/drivers/media/pci/cobalt/cobalt-driver.c @@ -339,15 +339,16 @@ static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev, } if (pcie_link_get_lanes(cobalt) != 8) { - cobalt_err("PCI Express link width is not 8 lanes (%d)\n", + cobalt_warn("PCI Express link width is %d lanes.\n", pcie_link_get_lanes(cobalt)); if (pcie_bus_link_get_lanes(cobalt) < 8) - cobalt_err("The current slot only supports %d lanes, at least 8 are needed\n", + cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n", pcie_bus_link_get_lanes(cobalt)); - else + if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) { cobalt_err("The card is most likely not seated correctly in the PCIe slot\n"); - ret = -EIO; - goto err_disable; + ret = -EIO; + goto err_disable; + } } if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) { |