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authorSteven Lee <steven_lee@aspeedtech.com>2021-12-14 07:02:38 +0300
committerSujoy Ray <sujoy.ray@intel.com>2022-02-09 19:28:35 +0300
commit96da09186ed329d58d7f230eeabbaea306b022ec (patch)
tree2c63345c733f85fae7f08ab4a772941435760060 /drivers/i2c
parent6720d7170bd3ab0f70c1d88157948e99ba378109 (diff)
downloadlinux-96da09186ed329d58d7f230eeabbaea306b022ec.tar.xz
gpio: gpio-aspeed-sgpio: Fix wrong hwirq base in irq handler
Each aspeed sgpio bank has 64 gpio pins(32 input pins and 32 output pins). The hwirq base for each sgpio bank should be multiples of 64 rather than multiples of 32. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> (cherry picked from commit e5a7431f5a2d6dcff7d516ee9d178a3254b17b87) Signed-off-by: Sujoy Ray <sujoy.ray@intel.com>
Diffstat (limited to 'drivers/i2c')
0 files changed, 0 insertions, 0 deletions