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authorTom St Denis <tom.stdenis@amd.com>2017-09-07 14:43:33 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-09-12 21:31:17 +0300
commit583a888a77bcc0e25e29f958a3a77c133306dc73 (patch)
tree8deac41ed9c822bde21a00fbb32a01b472d27797 /drivers/gpu/drm
parent7246187abf965d14d462faef74920b3dd16cb5e3 (diff)
downloadlinux-583a888a77bcc0e25e29f958a3a77c133306dc73.tar.xz
drm/amd/powerplay: Add PP_CAP() macro
To replace common lengthy sequence that would create really long lines all over. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
index a4c8b09b6f14..03adece4efea 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
@@ -283,6 +283,8 @@ static inline bool phm_cap_enabled(const uint32_t *caps, enum phm_platform_caps
(1UL << (c & (PHM_MAX_NUM_CAPS_BITS_PER_FIELD - 1)))));
}
+#define PP_CAP(c) phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, (c))
+
#define PP_PCIEGenInvalid 0xffff
enum PP_PCIEGen {
PP_PCIEGen1 = 0, /* PCIE 1.0 - Transfer rate of 2.5 GT/s */