diff options
| author | Thierry Reding <treding@nvidia.com> | 2017-10-12 20:14:21 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-13 16:36:37 +0300 |
| commit | 36e90221acf37dd0eb5dee70cd189cc60f2e501a (patch) | |
| tree | 48c2fdf1dec0ac4a68357a76bd807e990ca9063d /drivers/gpu/drm/tegra/sor.h | |
| parent | c57997bce423fb71334a1fefa524569e48a1718f (diff) | |
| download | linux-36e90221acf37dd0eb5dee70cd189cc60f2e501a.tar.xz | |
drm/tegra: sor: Support HDMI 2.0 modes
In addition to using the SCDC helpers to enable support for scrambling
for HDMI 2.0 modes, take into account the high pixel clocks when
programming some of the registers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/sor.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/sor.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/sor.h b/drivers/gpu/drm/tegra/sor.h index e85ffc8d98e4..fb0854d92a27 100644 --- a/drivers/gpu/drm/tegra/sor.h +++ b/drivers/gpu/drm/tegra/sor.h @@ -382,4 +382,8 @@ #define SOR_HDMI_VSI_INFOFRAME_STATUS 0x124 #define SOR_HDMI_VSI_INFOFRAME_HEADER 0x125 +#define SOR_HDMI2_CTRL 0x13e +#define SOR_HDMI2_CTRL_CLOCK_MODE_DIV_BY_4 (1 << 1) +#define SOR_HDMI2_CTRL_SCRAMBLE (1 << 0) + #endif |