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authorKieran Bingham <kieran.bingham+renesas@ideasonboard.com>2018-04-28 01:21:53 +0300
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-05-05 17:11:19 +0300
commit7ae90455bc865ab1c30fb4db53ac56ec32741ab9 (patch)
tree6046cbb08032c475f0aeabbdf1fcb99373f806cf /drivers/gpu/drm/rcar-du/rcar_du_group.c
parent5361cc7f8e9146f393cfcb76890d8c80a4e73086 (diff)
downloadlinux-7ae90455bc865ab1c30fb4db53ac56ec32741ab9.tar.xz
drm: rcar-du: Allow DU groups to work with hardware indexing
The group objects assume linear indexing, and more so always assume that channel 0 of any active group is used. Now that the CRTC objects support non-linear indexing, adapt the groups to remove assumptions that channel 0 is utilised in each group by using the channel mask provided in the device structures. Finally ensure that the RGB routing is determined from the index of the CRTC object (which represents the hardware DU channel index). Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/rcar-du/rcar_du_group.c')
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_group.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
index eead202c95c7..d539cb290a35 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
@@ -46,9 +46,12 @@ void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data)
static void rcar_du_group_setup_pins(struct rcar_du_group *rgrp)
{
- u32 defr6 = DEFR6_CODE | DEFR6_ODPM02_DISP;
+ u32 defr6 = DEFR6_CODE;
- if (rgrp->num_crtcs > 1)
+ if (rgrp->channels_mask & BIT(0))
+ defr6 |= DEFR6_ODPM02_DISP;
+
+ if (rgrp->channels_mask & BIT(1))
defr6 |= DEFR6_ODPM12_DISP;
rcar_du_group_write(rgrp, DEFR6, defr6);
@@ -80,10 +83,11 @@ static void rcar_du_group_setup_defr8(struct rcar_du_group *rgrp)
* On Gen3 VSPD routing can't be configured, but DPAD routing
* needs to be set despite having a single option available.
*/
- u32 crtc = ffs(possible_crtcs) - 1;
+ unsigned int rgb_crtc = ffs(possible_crtcs) - 1;
+ struct rcar_du_crtc *crtc = &rcdu->crtcs[rgb_crtc];
- if (crtc / 2 == rgrp->index)
- defr8 |= DEFR8_DRGBS_DU(crtc);
+ if (crtc->index / 2 == rgrp->index)
+ defr8 |= DEFR8_DRGBS_DU(crtc->index);
}
rcar_du_group_write(rgrp, DEFR8, defr8);