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author | Alex Deucher <alexander.deucher@amd.com> | 2013-01-19 04:17:22 +0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-02-01 01:24:53 +0400 |
commit | 168757ea854b7dd8eac3962753ed75a542ebca92 (patch) | |
tree | 2e7190c1fbdedf3da36f76a0215d711d9f3e62c4 /drivers/gpu/drm/radeon/nid.h | |
parent | a65a4369f7a69281b65ed42b7fa2a8e8d6ff585f (diff) | |
download | linux-168757ea854b7dd8eac3962753ed75a542ebca92.tar.xz |
drm/radeon: use status regs to determine what to reset (cayman)
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/nid.h')
-rw-r--r-- | drivers/gpu/drm/radeon/nid.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index c4b84c5a9ab7..079dee202a9e 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h @@ -49,6 +49,16 @@ #define RINGID(x) (((x) & 0x3) << 0) #define VMID(x) (((x) & 0x7) << 0) #define SRBM_STATUS 0x0E50 +#define RLC_RQ_PENDING (1 << 3) +#define GRBM_RQ_PENDING (1 << 5) +#define VMC_BUSY (1 << 8) +#define MCB_BUSY (1 << 9) +#define MCB_NON_DISPLAY_BUSY (1 << 10) +#define MCC_BUSY (1 << 11) +#define MCD_BUSY (1 << 12) +#define SEM_BUSY (1 << 14) +#define RLC_BUSY (1 << 15) +#define IH_BUSY (1 << 17) #define SRBM_SOFT_RESET 0x0E60 #define SOFT_RESET_BIF (1 << 1) @@ -68,6 +78,10 @@ #define SOFT_RESET_REGBB (1 << 22) #define SOFT_RESET_ORB (1 << 23) +#define SRBM_STATUS2 0x0EC4 +#define DMA_BUSY (1 << 5) +#define DMA1_BUSY (1 << 6) + #define VM_CONTEXT0_REQUEST_RESPONSE 0x1470 #define REQUEST_TYPE(x) (((x) & 0xf) << 0) #define RESPONSE_TYPE_MASK 0x000000F0 |