drm/nouveau/bus: switch to device pri macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

6 files changed, 54 insertions, 43 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.c
index ae924dda7b3d..b23475bbf3ad 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.c
@@ -29,15 +29,16 @@
 static int
 g94_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size)
 {
+	struct nvkm_device *device = bus->subdev.device;
 	int i;
 
-	nv_mask(bus, 0x001098, 0x00000008, 0x00000000);
-	nv_wr32(bus, 0x001304, 0x00000000);
-	nv_wr32(bus, 0x001318, 0x00000000);
+	nvkm_mask(device, 0x001098, 0x00000008, 0x00000000);
+	nvkm_wr32(device, 0x001304, 0x00000000);
+	nvkm_wr32(device, 0x001318, 0x00000000);
 	for (i = 0; i < size; i++)
-		nv_wr32(bus, 0x080000 + (i * 4), data[i]);
-	nv_mask(bus, 0x001098, 0x00000018, 0x00000018);
-	nv_wr32(bus, 0x00130c, 0x00000001);
+		nvkm_wr32(device, 0x080000 + (i * 4), data[i]);
+	nvkm_mask(device, 0x001098, 0x00000018, 0x00000018);
+	nvkm_wr32(device, 0x00130c, 0x00000001);
 
 	return nv_wait(bus, 0x001308, 0x00000100, 0x00000000) ? 0 : -ETIMEDOUT;
 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c
index d46ecd8e754f..d7e92d049c84 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c
@@ -28,11 +28,12 @@ static void
 gf100_bus_intr(struct nvkm_subdev *subdev)
 {
 	struct nvkm_bus *bus = nvkm_bus(subdev);
-	u32 stat = nv_rd32(bus, 0x001100) & nv_rd32(bus, 0x001140);
+	struct nvkm_device *device = bus->subdev.device;
+	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
 
 	if (stat & 0x0000000e) {
-		u32 addr = nv_rd32(bus, 0x009084);
-		u32 data = nv_rd32(bus, 0x009088);
+		u32 addr = nvkm_rd32(device, 0x009084);
+		u32 data = nvkm_rd32(device, 0x009088);
 
 		nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x [ %s%s%s]\n",
 			 (addr & 0x00000002) ? "write" : "read", data,
@@ -41,14 +42,14 @@ gf100_bus_intr(struct nvkm_subdev *subdev)
 			 (stat & 0x00000004) ? "IBUS " : "",
 			 (stat & 0x00000008) ? "TIMEOUT " : "");
 
-		nv_wr32(bus, 0x009084, 0x00000000);
-		nv_wr32(bus, 0x001100, (stat & 0x0000000e));
+		nvkm_wr32(device, 0x009084, 0x00000000);
+		nvkm_wr32(device, 0x001100, (stat & 0x0000000e));
 		stat &= ~0x0000000e;
 	}
 
 	if (stat) {
 		nv_error(bus, "unknown intr 0x%08x\n", stat);
-		nv_mask(bus, 0x001140, stat, 0x00000000);
+		nvkm_mask(device, 0x001140, stat, 0x00000000);
 	}
 }
 
@@ -56,14 +57,15 @@ static int
 gf100_bus_init(struct nvkm_object *object)
 {
 	struct nvkm_bus *bus = (void *)object;
+	struct nvkm_device *device = bus->subdev.device;
 	int ret;
 
 	ret = nvkm_bus_init(bus);
 	if (ret)
 		return ret;
 
-	nv_wr32(bus, 0x001100, 0xffffffff);
-	nv_wr32(bus, 0x001140, 0x0000000e);
+	nvkm_wr32(device, 0x001100, 0xffffffff);
+	nvkm_wr32(device, 0x001140, 0x0000000e);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h
index 4ce54d4f2e73..6f498cd4b82f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h
@@ -85,8 +85,9 @@ hwsq_exec(struct hwsq *ram, bool exec)
 static inline u32
 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg)
 {
+	struct nvkm_device *device = ram->subdev->device;
 	if (reg->sequence != ram->sequence)
-		reg->data = nv_rd32(ram->subdev, reg->addr);
+		reg->data = nvkm_rd32(device, reg->addr);
 	return reg->data;
 }
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c
index 2066d38d12de..1f6873a76e76 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c
@@ -28,12 +28,13 @@ static void
 nv04_bus_intr(struct nvkm_subdev *subdev)
 {
 	struct nvkm_bus *bus = nvkm_bus(subdev);
-	u32 stat = nv_rd32(bus, 0x001100) & nv_rd32(bus, 0x001140);
+	struct nvkm_device *device = bus->subdev.device;
+	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
 
 	if (stat & 0x00000001) {
 		nv_error(bus, "BUS ERROR\n");
 		stat &= ~0x00000001;
-		nv_wr32(bus, 0x001100, 0x00000001);
+		nvkm_wr32(device, 0x001100, 0x00000001);
 	}
 
 	if (stat & 0x00000110) {
@@ -41,12 +42,12 @@ nv04_bus_intr(struct nvkm_subdev *subdev)
 		if (subdev && subdev->intr)
 			subdev->intr(subdev);
 		stat &= ~0x00000110;
-		nv_wr32(bus, 0x001100, 0x00000110);
+		nvkm_wr32(device, 0x001100, 0x00000110);
 	}
 
 	if (stat) {
 		nv_error(bus, "unknown intr 0x%08x\n", stat);
-		nv_mask(bus, 0x001140, stat, 0x00000000);
+		nvkm_mask(device, 0x001140, stat, 0x00000000);
 	}
 }
 
@@ -54,9 +55,10 @@ static int
 nv04_bus_init(struct nvkm_object *object)
 {
 	struct nvkm_bus *bus = (void *)object;
+	struct nvkm_device *device = bus->subdev.device;
 
-	nv_wr32(bus, 0x001100, 0xffffffff);
-	nv_wr32(bus, 0x001140, 0x00000111);
+	nvkm_wr32(device, 0x001100, 0xffffffff);
+	nvkm_wr32(device, 0x001140, 0x00000111);
 
 	return nvkm_bus_init(bus);
 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c
index 7565d2f047e7..e8ee4cd7c025 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c
@@ -28,8 +28,9 @@ static void
 nv31_bus_intr(struct nvkm_subdev *subdev)
 {
 	struct nvkm_bus *bus = nvkm_bus(subdev);
-	u32 stat = nv_rd32(bus, 0x001100) & nv_rd32(bus, 0x001140);
-	u32 gpio = nv_rd32(bus, 0x001104) & nv_rd32(bus, 0x001144);
+	struct nvkm_device *device = bus->subdev.device;
+	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
+	u32 gpio = nvkm_rd32(device, 0x001104) & nvkm_rd32(device, 0x001144);
 
 	if (gpio) {
 		subdev = nvkm_subdev(bus, NVDEV_SUBDEV_GPIO);
@@ -38,15 +39,15 @@ nv31_bus_intr(struct nvkm_subdev *subdev)
 	}
 
 	if (stat & 0x00000008) {  /* NV41- */
-		u32 addr = nv_rd32(bus, 0x009084);
-		u32 data = nv_rd32(bus, 0x009088);
+		u32 addr = nvkm_rd32(device, 0x009084);
+		u32 data = nvkm_rd32(device, 0x009088);
 
 		nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n",
 			 (addr & 0x00000002) ? "write" : "read", data,
 			 (addr & 0x00fffffc));
 
 		stat &= ~0x00000008;
-		nv_wr32(bus, 0x001100, 0x00000008);
+		nvkm_wr32(device, 0x001100, 0x00000008);
 	}
 
 	if (stat & 0x00070000) {
@@ -54,12 +55,12 @@ nv31_bus_intr(struct nvkm_subdev *subdev)
 		if (subdev && subdev->intr)
 			subdev->intr(subdev);
 		stat &= ~0x00070000;
-		nv_wr32(bus, 0x001100, 0x00070000);
+		nvkm_wr32(device, 0x001100, 0x00070000);
 	}
 
 	if (stat) {
 		nv_error(bus, "unknown intr 0x%08x\n", stat);
-		nv_mask(bus, 0x001140, stat, 0x00000000);
+		nvkm_mask(device, 0x001140, stat, 0x00000000);
 	}
 }
 
@@ -67,14 +68,15 @@ static int
 nv31_bus_init(struct nvkm_object *object)
 {
 	struct nvkm_bus *bus = (void *)object;
+	struct nvkm_device *device = bus->subdev.device;
 	int ret;
 
 	ret = nvkm_bus_init(bus);
 	if (ret)
 		return ret;
 
-	nv_wr32(bus, 0x001100, 0xffffffff);
-	nv_wr32(bus, 0x001140, 0x00070008);
+	nvkm_wr32(device, 0x001100, 0xffffffff);
+	nvkm_wr32(device, 0x001140, 0x00070008);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c
index f6a55b831ea2..69d55b435c6c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c
@@ -29,14 +29,15 @@
 static int
 nv50_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size)
 {
+	struct nvkm_device *device = bus->subdev.device;
 	int i;
 
-	nv_mask(bus, 0x001098, 0x00000008, 0x00000000);
-	nv_wr32(bus, 0x001304, 0x00000000);
+	nvkm_mask(device, 0x001098, 0x00000008, 0x00000000);
+	nvkm_wr32(device, 0x001304, 0x00000000);
 	for (i = 0; i < size; i++)
-		nv_wr32(bus, 0x001400 + (i * 4), data[i]);
-	nv_mask(bus, 0x001098, 0x00000018, 0x00000018);
-	nv_wr32(bus, 0x00130c, 0x00000003);
+		nvkm_wr32(device, 0x001400 + (i * 4), data[i]);
+	nvkm_mask(device, 0x001098, 0x00000018, 0x00000018);
+	nvkm_wr32(device, 0x00130c, 0x00000003);
 
 	return nv_wait(bus, 0x001308, 0x00000100, 0x00000000) ? 0 : -ETIMEDOUT;
 }
@@ -45,18 +46,19 @@ void
 nv50_bus_intr(struct nvkm_subdev *subdev)
 {
 	struct nvkm_bus *bus = nvkm_bus(subdev);
-	u32 stat = nv_rd32(bus, 0x001100) & nv_rd32(bus, 0x001140);
+	struct nvkm_device *device = bus->subdev.device;
+	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
 
 	if (stat & 0x00000008) {
-		u32 addr = nv_rd32(bus, 0x009084);
-		u32 data = nv_rd32(bus, 0x009088);
+		u32 addr = nvkm_rd32(device, 0x009084);
+		u32 data = nvkm_rd32(device, 0x009088);
 
 		nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n",
 			 (addr & 0x00000002) ? "write" : "read", data,
 			 (addr & 0x00fffffc));
 
 		stat &= ~0x00000008;
-		nv_wr32(bus, 0x001100, 0x00000008);
+		nvkm_wr32(device, 0x001100, 0x00000008);
 	}
 
 	if (stat & 0x00010000) {
@@ -64,12 +66,12 @@ nv50_bus_intr(struct nvkm_subdev *subdev)
 		if (subdev && subdev->intr)
 			subdev->intr(subdev);
 		stat &= ~0x00010000;
-		nv_wr32(bus, 0x001100, 0x00010000);
+		nvkm_wr32(device, 0x001100, 0x00010000);
 	}
 
 	if (stat) {
 		nv_error(bus, "unknown intr 0x%08x\n", stat);
-		nv_mask(bus, 0x001140, stat, 0);
+		nvkm_mask(device, 0x001140, stat, 0);
 	}
 }
 
@@ -77,14 +79,15 @@ int
 nv50_bus_init(struct nvkm_object *object)
 {
 	struct nvkm_bus *bus = (void *)object;
+	struct nvkm_device *device = bus->subdev.device;
 	int ret;
 
 	ret = nvkm_bus_init(bus);
 	if (ret)
 		return ret;
 
-	nv_wr32(bus, 0x001100, 0xffffffff);
-	nv_wr32(bus, 0x001140, 0x00010008);
+	nvkm_wr32(device, 0x001100, 0xffffffff);
+	nvkm_wr32(device, 0x001140, 0x00010008);
 	return 0;
 }