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| author | Ben Skeggs <bskeggs@redhat.com> | 2019-06-13 07:23:04 +0300 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2019-08-23 05:55:32 +0300 |
| commit | cde540211ab1346a262ad9a5ecc52c9ff8f5975f (patch) | |
| tree | 29e3b41d3e7581b705e95a47430c0415f7e390d9 /drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c | |
| parent | cf9518b50a9c68cafb07e05fc54731071228ced3 (diff) | |
| download | linux-cde540211ab1346a262ad9a5ecc52c9ff8f5975f.tar.xz | |
drm/nouveau/fifo/gk104-: fix parsing of mmu fault data
Pascal was particularly incorrect, as the register changed to be more in the
same format as the MMU fault buffers are.
Shouldn't have impacted much more than confusing MMU fault log messages.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c index acf230764cb0..c2a2e4572f6c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c @@ -25,6 +25,7 @@ #include "changk104.h" #include <core/gpuobj.h> +#include <subdev/fault.h> #include <nvif/class.h> @@ -67,8 +68,33 @@ gm107_fifo_fault_engine[] = { {} }; +void +gm107_fifo_intr_fault(struct nvkm_fifo *fifo, int unit) +{ + struct nvkm_device *device = fifo->engine.subdev.device; + u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); + u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); + u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); + u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10)); + struct nvkm_fault_data info; + + info.inst = (u64)inst << 12; + info.addr = ((u64)vahi << 32) | valo; + info.time = 0; + info.engine = unit; + info.valid = 1; + info.gpc = (type & 0x1f000000) >> 24; + info.client = (type & 0x00003f00) >> 8; + info.access = (type & 0x00000080) >> 7; + info.hub = (type & 0x00000040) >> 6; + info.reason = (type & 0x0000000f); + + nvkm_fifo_fault(fifo, &info); +} + static const struct gk104_fifo_func gm107_fifo = { + .intr.fault = gm107_fifo_intr_fault, .pbdma = &gk208_fifo_pbdma, .fault.access = gk104_fifo_fault_access, .fault.engine = gm107_fifo_fault_engine, |