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| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-08-28 12:38:40 +0300 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-08-28 12:38:40 +0300 |
| commit | 1e05a7e6ebc4a5a5c53dce32e7e6d0ff5e7e08d1 (patch) | |
| tree | f7f6cb5a1ee2fe271e7f794970fa1a4722784ed3 /drivers/gpu/drm/msm/adreno/a6xx_gpu.c | |
| parent | 913787ca40b9b5981bea1d1157cdd8cb23e12b54 (diff) | |
| parent | a55aa89aab90fae7c815b0551b07be37db359d76 (diff) | |
| download | linux-1e05a7e6ebc4a5a5c53dce32e7e6d0ff5e7e08d1.tar.xz | |
Merge tag 'v5.3-rc6' into spi-nor/next
Linux 5.3-rc6
Merge back latest release candidate, to include a fix that
we depend on for new development:
834de5c1aa76 ("mtd: spi-nor: Fix the disabling of write protection at init")
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a6xx_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index be39cf01e51e..dc8ec2c94301 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -115,6 +115,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: if (priv->lastctx == ctx) break; + /* fall-thru */ case MSM_SUBMIT_CMD_BUF: OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); |