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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-12-09 00:37:37 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-12-22 15:22:48 +0300 |
commit | 54c105d6cbcc93507247e82750e83eb49ff5d82b (patch) | |
tree | fe980e5601bb9330dcc4bbd5037f954525f5c8a0 /drivers/gpu/drm/i915/intel_runtime_pm.c | |
parent | 156961ae7bdf6feb72778e8da83d321b273343fd (diff) | |
download | linux-54c105d6cbcc93507247e82750e83eb49ff5d82b.tar.xz |
drm/i915: No need to power up PG2 for GMBUS on BXT
GMBUS lives in PG1, so no need to power up PG2. We do want to prevent
the DMC from making a mess of things though, so add GMBUS to the DC off
power well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-2-ville.syrjala@linux.intel.com
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 522e0a63090f..db9d57f39534 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1726,13 +1726,13 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL(POWER_DOMAIN_VGA) | \ - BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define BXT_DISPLAY_DC_OFF_POWER_DOMAINS ( \ BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS | \ BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL(POWER_DOMAIN_AUX_A) | \ + BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define BXT_DPIO_CMN_A_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \ |