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authorLucas De Marchi <lucas.demarchi@intel.com>2019-01-26 01:24:41 +0300
committerLucas De Marchi <lucas.demarchi@intel.com>2019-01-30 01:35:02 +0300
commit584fca111d0cf32f6002472d9cb13c4555587438 (patch)
tree908f8471e76b505f274dd02a1a56e919b2cefd76 /drivers/gpu/drm/i915/intel_dpll_mgr.h
parent789659f4307abc1c2356db09eeefefd3f445c12d (diff)
downloadlinux-584fca111d0cf32f6002472d9cb13c4555587438.tar.xz
drm/i915/icl: use tc_port in MG_PLL macros
Fix the TODO leftover in the code by changing the argument in MG_PLL macros. The MG_PLL ids used to access the register values can be converted from tc_port rather than port. All these registers can use the TC port to calculate the right offsets because they are only available for TC ports. The range (PORT_C onwards) may not be stable and change from platform to platform. So by using the TC id directly we avoid having to check for the platform in the "leaf functions" and thus passing dev_priv around. The helper functions were also renamed to use "tc" as prefix to make them more generic. v2: Improve commit message and fix checkpatch warning (from Paulo) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190125222444.19926-2-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h')
-rw-r--r--drivers/gpu/drm/i915/intel_dpll_mgr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index e96e79413b54..40e8391a92f2 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -344,7 +344,7 @@ void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv,
int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
u32 pll_id);
int cnl_hdmi_pll_ref_clock(struct drm_i915_private *dev_priv);
-enum intel_dpll_id icl_port_to_mg_pll_id(enum port port);
+enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port);
bool intel_dpll_is_combophy(enum intel_dpll_id id);
#endif /* _INTEL_DPLL_MGR_H_ */