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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-25 20:53:19 +0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-29 01:37:30 +0400 |
| commit | 2e9723a3e76a050f80064249dac644f86541d3b4 (patch) | |
| tree | 25c1d4c553f96330b893a8874c510e04a85f47c1 /drivers/gpu/drm/i915/i915_suspend.c | |
| parent | 41c0b3a88c7bae96d8e2ee60c7ed91f57fd152d7 (diff) | |
| download | linux-2e9723a3e76a050f80064249dac644f86541d3b4.tar.xz | |
drm/i915: move modeset checks out of save/restore_modeset_reg
That way the control flow is clearer, and it prepares the stage
to extract these ums functions and hide them somewhere.
There's still tons of display stuff outside of these, but that
requires more work.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 95c0582eae77..bcde494b3805 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -240,9 +240,6 @@ static void i915_save_modeset_reg(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; int i; - if (drm_core_check_feature(dev, DRIVER_MODESET)) - return; - /* Cursor state */ dev_priv->regfile.saveCURACNTR = I915_READ(_CURACNTR); dev_priv->regfile.saveCURAPOS = I915_READ(_CURAPOS); @@ -410,8 +407,17 @@ static void i915_restore_modeset_reg(struct drm_device *dev) int dpll_b_reg, fpb0_reg, fpb1_reg; int i; - if (drm_core_check_feature(dev, DRIVER_MODESET)) - return; + /* Display port ratios (must be done before clock is set) */ + if (SUPPORTS_INTEGRATED_DP(dev)) { + I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M); + I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M); + I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N); + I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N); + I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M); + I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M); + I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N); + I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N); + } /* Fences */ switch (INTEL_INFO(dev)->gen) { @@ -625,7 +631,8 @@ static void i915_save_display(struct drm_device *dev) /* This is only meaningful in non-KMS mode */ /* Don't regfile.save them in KMS mode */ - i915_save_modeset_reg(dev); + if (!drm_core_check_feature(dev, DRIVER_MODESET)) + i915_save_modeset_reg(dev); /* LVDS state */ if (HAS_PCH_SPLIT(dev)) { @@ -711,23 +718,8 @@ static void i915_restore_display(struct drm_device *dev) if (INTEL_INFO(dev)->gen <= 4) I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB); - if (!drm_core_check_feature(dev, DRIVER_MODESET)) { - /* Display port ratios (must be done before clock is set) */ - if (SUPPORTS_INTEGRATED_DP(dev)) { - I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M); - I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M); - I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N); - I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N); - I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M); - I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M); - I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N); - I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N); - } - } - - /* This is only meaningful in non-KMS mode */ - /* Don't restore them in KMS mode */ - i915_restore_modeset_reg(dev); + if (!drm_core_check_feature(dev, DRIVER_MODESET)) + i915_restore_modeset_reg(dev); /* LVDS state */ if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) |