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author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2015-10-27 15:47:03 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-09 20:15:32 +0300 |
commit | 16e11b994635788042f963ca1822b7cf9cd9cc94 (patch) | |
tree | dbf9d5d8f2586e7f9caba7a0b910e3a0785e980b /drivers/gpu/drm/i915/i915_reg.h | |
parent | 8337206d3bf088c9f60ada7a71188b7f4b4ec2eb (diff) | |
download | linux-16e11b994635788042f963ca1822b7cf9cd9cc94.tar.xz |
drm/i915/bxt: Expose DC5 entry count
For bxt CSR firmware exposes a count of dc5 entries. Expose
it through debugs
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index bbfc9d9a5b49..083991271060 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5700,6 +5700,7 @@ enum skl_disp_power_wells { /* DMC/CSR */ #define SKL_CSR_DC3_DC5_COUNT 0x80030 #define SKL_CSR_DC5_DC6_COUNT 0x8002C +#define BXT_CSR_DC3_DC5_COUNT 0x80038 /* interrupts */ #define DE_MASTER_IRQ_CONTROL (1 << 31) |