summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_oa_hsw.h
diff options
context:
space:
mode:
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2017-06-13 14:23:01 +0300
committerBen Widawsky <ben@bwidawsk.net>2017-06-14 22:31:57 +0300
commit3f488d99858d22f584e1734f317bfcff9dbdf4fd (patch)
tree012635a952e9eee7acf2ccb2e47509e04de869fc /drivers/gpu/drm/i915/i915_oa_hsw.h
parentf532023381df49ac00cb2d1e70df607cf534720d (diff)
downloadlinux-3f488d99858d22f584e1734f317bfcff9dbdf4fd.tar.xz
drm/i915/perf: rework mux configurations queries
Gen8+ might have mux configurations per slices/subslices. Depending on whether slices/subslices have been fused off, only part of the configuration needs to be applied. This change reworks the mux configurations query mechanism to allow more than one set of registers to be programmed. v2: s/n_mux_regs/n_mux_configs/ (Matthew) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_oa_hsw.h')
-rw-r--r--drivers/gpu/drm/i915/i915_oa_hsw.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.h b/drivers/gpu/drm/i915/i915_oa_hsw.h
index 429a229b5158..6fe7e0690ef3 100644
--- a/drivers/gpu/drm/i915/i915_oa_hsw.h
+++ b/drivers/gpu/drm/i915/i915_oa_hsw.h
@@ -1,5 +1,7 @@
/*
- * Autogenerated file, DO NOT EDIT manually!
+ * Autogenerated file by GPU Top : https://github.com/rib/gputop
+ * DO NOT EDIT manually!
+ *
*
* Copyright (c) 2015 Intel Corporation
*