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authorZhi Wang <zhi.a.wang@intel.com>2016-09-02 08:33:29 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2016-10-14 13:12:59 +0300
commite39c5add322184de3be052d438dfd24375bfeaea (patch)
treea8724bab7dabd340016a91f0b2b0fa8c86cfda0c /drivers/gpu/drm/i915/gvt/gvt.h
parent4d60c5fd3f8751ea751d6dc6cfe0c1620420ccf8 (diff)
downloadlinux-e39c5add322184de3be052d438dfd24375bfeaea.tar.xz
drm/i915/gvt: vGPU MMIO virtualization
This patch introduces the generic vGPU MMIO emulation intercept framework. The MPT modules will request GVT-g core logic to emulate MMIO read/write through IO emulation operations callback when hypervisor trapped a guest GTTMMIO read/write. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gvt.h')
-rw-r--r--drivers/gpu/drm/i915/gvt/gvt.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index f895c9242a28..2560c3aaac45 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -87,6 +87,7 @@ struct intel_vgpu_fence {
struct intel_vgpu_mmio {
void *vreg;
void *sreg;
+ bool disable_warn_untrack;
};
#define INTEL_GVT_MAX_CFG_SPACE_SZ 256
@@ -184,6 +185,8 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.base.total)
+#define gvt_ggtt_sz(gvt) \
+ ((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)
#define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))
#define gvt_aperture_gmadr_base(gvt) (0)