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authorZhi Wang <zhi.a.wang@intel.com>2016-06-30 19:45:34 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2016-10-14 13:11:46 +0300
commit579cea5f30f2c70215492e987bb439a3e50c6371 (patch)
treec01b1e3d3e0a1734b9b43b9fcd1809d27b9efa18 /drivers/gpu/drm/i915/gvt/gvt.h
parent12d14cc43b34706283246917329b2182163ba9aa (diff)
downloadlinux-579cea5f30f2c70215492e987bb439a3e50c6371.tar.xz
drm/i915/gvt: golden virtual HW state management
Each vGPU expects a golden virtual HW state, which is just the state after system is freshly powered on. GVT-g will try to load the golden virtual HW state via kernel firmware interface. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gvt.h')
-rw-r--r--drivers/gpu/drm/i915/gvt/gvt.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 024ad97eba12..e8759680e952 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -56,6 +56,8 @@ extern struct intel_gvt_host intel_gvt_host;
struct intel_gvt_device_info {
u32 max_support_vgpus;
u32 mmio_size;
+ u32 cfg_space_size;
+ u32 mmio_bar;
};
/* GM resources owned by a vGPU */
@@ -100,6 +102,12 @@ struct intel_gvt_mmio {
DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
};
+struct intel_gvt_firmware {
+ void *cfg_space;
+ void *mmio;
+ bool firmware_loaded;
+};
+
struct intel_gvt {
struct mutex lock;
bool initialized;
@@ -111,8 +119,12 @@ struct intel_gvt {
struct intel_gvt_gm gm;
struct intel_gvt_fence fence;
struct intel_gvt_mmio mmio;
+ struct intel_gvt_firmware firmware;
};
+void intel_gvt_free_firmware(struct intel_gvt *gvt);
+int intel_gvt_load_firmware(struct intel_gvt *gvt);
+
/* Aperture/GM space definitions for GVT device */
#define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end)
#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)