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authorEric Huang <JinHuiEric.Huang@amd.com>2017-02-07 19:46:21 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-03-30 06:52:54 +0300
commit2245b60f9c3f5047c581f93d5a2656a0c5988c0e (patch)
treedfb3ba07bd9ac52b6c4b04583477951bd7af1b48 /drivers/gpu/drm/amd/powerplay
parent4f9afc9bd23fce85f2022af50d0127a64121bb37 (diff)
downloadlinux-2245b60f9c3f5047c581f93d5a2656a0c5988c0e.tar.xz
drm/amd/powerplay: implement gpu power display for smu7_hwmgr
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index c3f8e9d56563..5a4ee43b3d65 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3289,6 +3289,37 @@ static int smu7_get_pp_table_entry(struct pp_hwmgr *hwmgr,
return 0;
}
+static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
+ struct pp_gpu_power *query)
+{
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr->smumgr,
+ PPSMC_MSG_PmStatusLogStart),
+ "Failed to start pm status log!",
+ return -1);
+
+ msleep_interruptible(2000);
+
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr->smumgr,
+ PPSMC_MSG_PmStatusLogSample),
+ "Failed to sample pm status log!",
+ return -1);
+
+ query->vddc_power = cgs_read_ind_register(hwmgr->device,
+ CGS_IND_REG__SMC,
+ ixSMU_PM_STATUS_40);
+ query->vddci_power = cgs_read_ind_register(hwmgr->device,
+ CGS_IND_REG__SMC,
+ ixSMU_PM_STATUS_49);
+ query->max_gpu_power = cgs_read_ind_register(hwmgr->device,
+ CGS_IND_REG__SMC,
+ ixSMU_PM_STATUS_94);
+ query->average_gpu_power = cgs_read_ind_register(hwmgr->device,
+ CGS_IND_REG__SMC,
+ ixSMU_PM_STATUS_95);
+
+ return 0;
+}
+
static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value)
{
uint32_t sclk, mclk, activity_percent;
@@ -3325,6 +3356,8 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value)
case AMDGPU_PP_SENSOR_VCE_POWER:
*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;
return 0;
+ case AMDGPU_PP_SENSOR_GPU_POWER:
+ return smu7_get_gpu_power(hwmgr, (struct pp_gpu_power *)value);
default:
return -EINVAL;
}