diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2016-09-06 11:35:01 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-14 22:10:34 +0300 |
| commit | 9597f40365760873bf7fc399bb5c40c3d9949359 (patch) | |
| tree | 462dd6b6351abe0b7ab6e68fcbeddf18369ef5c3 /drivers/gpu/drm/amd/powerplay/inc | |
| parent | 5141e9d2f7811e1ba714e069c4f12b64de67030f (diff) | |
| download | linux-9597f40365760873bf7fc399bb5c40c3d9949359.tar.xz | |
drm/amd/powerplay: initialize platform caps in hwmgr_init.
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index 962cb5385951..d4495839c64c 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -341,7 +341,6 @@ extern int phm_powerdown_uvd(struct pp_hwmgr *hwmgr); extern int phm_setup_asic(struct pp_hwmgr *hwmgr); extern int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr); extern int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr); -extern void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr); extern bool phm_is_hw_access_blocked(struct pp_hwmgr *hwmgr); extern int phm_block_hw_access(struct pp_hwmgr *hwmgr, bool block); extern int phm_set_power_state(struct pp_hwmgr *hwmgr, diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index a4d490a8ffe6..2a060f6c2041 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -40,6 +40,7 @@ struct pp_atomctrl_voltage_table; extern int amdgpu_powercontainment; extern int amdgpu_sclk_deep_sleep_en; +extern unsigned amdgpu_pp_feature_mask; enum DISPLAY_GAP { DISPLAY_GAP_VBLANK_OR_WM = 0, /* Wait for vblank or MCHG watermark. */ |