diff options
| author | Hersen Wu <hersenxs.wu@amd.com> | 2018-08-21 16:35:47 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-09-11 06:43:18 +0300 |
| commit | 0e8e4fbf8d8905071c045f2922de55adbe1a6abe (patch) | |
| tree | 628d390bf35e2df39a5d614e215d4b6d92ac9b1b /drivers/gpu/drm/amd/display/dc/dce100 | |
| parent | 86a2da705cc29a3a006c6571cadfa45676150622 (diff) | |
| download | linux-0e8e4fbf8d8905071c045f2922de55adbe1a6abe.tar.xz | |
drm/amd/display: num of sw i2c/aux engines less than num of connectors
[why]
AMD Stoney reference board, there are only 2 pipes (not include
underlay), and 3 connectors. resource creation, only
2 I2C/AUX engines are created. Within dc_link_aux_transfer, when
pin_data_en =2, refer to enengines[ddc_pin->pin_data->en] = NULL.
NULL point is referred later causing system crash.
[how]
each asic design has fixed number of ddc engines at hw side.
for each ddc engine, create its i2x/aux engine at sw side.
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce100')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c index ae613b025756..b1cc38827f09 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c @@ -372,7 +372,8 @@ static const struct resource_caps res_cap = { .num_timing_generator = 6, .num_audio = 6, .num_stream_encoder = 6, - .num_pll = 3 + .num_pll = 3, + .num_ddc = 6, }; #define CTX ctx @@ -1004,6 +1005,9 @@ static bool construct( "DC: failed to create output pixel processor!\n"); goto res_create_fail; } + } + + for (i = 0; i < pool->base.res_cap->num_ddc; i++) { pool->base.engines[i] = dce100_aux_engine_create(ctx, i); if (pool->base.engines[i] == NULL) { BREAK_TO_DEBUGGER(); |