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authorYong Zhao <yong.zhao@amd.com>2017-09-16 01:20:37 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 22:14:21 +0300
commit7bdc53f925af085ffa0580f10489f82b36cc2f1c (patch)
tree8b760f772a29969ecce509371d55e22111a19627 /drivers/gpu/drm/amd/amdgpu/si_dma.c
parentdfe5c2b76b2a32cd37283809737e55f9208f8346 (diff)
downloadlinux-7bdc53f925af085ffa0580f10489f82b36cc2f1c.tar.xz
drm/amdgpu: Fix a bug in amdgpu_fill_buffer()
When max_bytes is not 8 bytes aligned and bo size is larger than max_bytes, the last 8 bytes in a ttm node may be left unchanged. For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size is 0x200000, the problem will happen. In order to fix the problem, we separately store the max nums of PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs structure, rather than inferring it from bytes limit of SDMA constant fill, i.e. fill_max_bytes. Together with the fix, we replace the hard code value "10" in amdgpu_vm_bo_update_mapping() with the corresponding values from structure amdgpu_vm_pte_funcs. Signed-off-by: Yong Zhao <yong.zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/si_dma.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_dma.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
index 112969f3301a..adb6ae7d63ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
@@ -889,6 +889,9 @@ static void si_dma_set_buffer_funcs(struct amdgpu_device *adev)
static const struct amdgpu_vm_pte_funcs si_dma_vm_pte_funcs = {
.copy_pte = si_dma_vm_copy_pte,
.write_pte = si_dma_vm_write_pte,
+
+ .set_max_nums_pte_pde = 0xffff8 >> 3,
+ .set_pte_pde_num_dw = 9,
.set_pte_pde = si_dma_vm_set_pte_pde,
};