diff options
| author | Sean Paul <seanpaul@chromium.org> | 2018-09-27 09:54:54 +0300 |
|---|---|---|
| committer | Sean Paul <seanpaul@chromium.org> | 2018-09-27 09:54:54 +0300 |
| commit | 7b76d0588477d4b6097a9048b42835a45caf5c48 (patch) | |
| tree | fa4e0bcd49f8d17f26795224290c8f8460aa4116 /drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | |
| parent | a74c0aa524050e5fd6c275a153b1f37283f6e37c (diff) | |
| parent | bf78296ab1cb215d0609ac6cff4e43e941e51265 (diff) | |
| download | linux-7b76d0588477d4b6097a9048b42835a45caf5c48.tar.xz | |
Merge drm/drm-next into drm-misc-next
Backmerging 4.19-rc5 to pick up sun4i fix
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h index 0e01f115bbe5..0d5b3f5201d2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h @@ -24,7 +24,6 @@ #ifndef __AMDGPU_IH_H__ #define __AMDGPU_IH_H__ -#include <linux/chash.h> #include "soc15_ih_clientid.h" struct amdgpu_device; @@ -32,13 +31,6 @@ struct amdgpu_device; #define AMDGPU_IH_CLIENTID_LEGACY 0 #define AMDGPU_IH_CLIENTID_MAX SOC15_IH_CLIENTID_MAX -#define AMDGPU_PAGEFAULT_HASH_BITS 8 -struct amdgpu_retryfault_hashtable { - DECLARE_CHASH_TABLE(hash, AMDGPU_PAGEFAULT_HASH_BITS, 8, 0); - spinlock_t lock; - int count; -}; - /* * R6xx+ IH ring */ @@ -57,7 +49,6 @@ struct amdgpu_ih_ring { bool use_doorbell; bool use_bus_addr; dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ - struct amdgpu_retryfault_hashtable *faults; }; #define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4 @@ -76,11 +67,24 @@ struct amdgpu_iv_entry { const uint32_t *iv_entry; }; +/* provided by the ih block */ +struct amdgpu_ih_funcs { + /* ring read/write ptr handling, called from interrupt context */ + u32 (*get_wptr)(struct amdgpu_device *adev); + bool (*prescreen_iv)(struct amdgpu_device *adev); + void (*decode_iv)(struct amdgpu_device *adev, + struct amdgpu_iv_entry *entry); + void (*set_rptr)(struct amdgpu_device *adev); +}; + +#define amdgpu_ih_get_wptr(adev) (adev)->irq.ih_funcs->get_wptr((adev)) +#define amdgpu_ih_prescreen_iv(adev) (adev)->irq.ih_funcs->prescreen_iv((adev)) +#define amdgpu_ih_decode_iv(adev, iv) (adev)->irq.ih_funcs->decode_iv((adev), (iv)) +#define amdgpu_ih_set_rptr(adev) (adev)->irq.ih_funcs->set_rptr((adev)) + int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, bool use_bus_addr); void amdgpu_ih_ring_fini(struct amdgpu_device *adev); int amdgpu_ih_process(struct amdgpu_device *adev); -int amdgpu_ih_add_fault(struct amdgpu_device *adev, u64 key); -void amdgpu_ih_clear_fault(struct amdgpu_device *adev, u64 key); #endif |