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author | Keith Mannthey <kmannth@us.ibm.com> | 2009-09-03 06:46:59 +0400 |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-05-10 18:44:56 +0400 |
commit | 61053fdedb2080dadc18dc37abbba90d2e74bc03 (patch) | |
tree | 482b54f2dfbbb776ecc69b6ed3e54ba3d03cd219 /drivers/edac/i7core_edac.c | |
parent | 3ef288a98307adc9d3f83321b26281567f348ec6 (diff) | |
download | linux-61053fdedb2080dadc18dc37abbba90d2e74bc03.tar.xz |
i7core_edac: Fix ecc enable shift
From: Keith Mannthey <kmannth@us.ibm.com>
Simple correction to a shift value.
ECC_ENABLED is bit 4 of MC_STATUS, Dev 3 Fun 0 Offset 0x4c
This correctly identifies the state of the ECC at the machine.
Signed-off-by: Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i7core_edac.c')
-rw-r--r-- | drivers/edac/i7core_edac.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 26205e2efecf..87d5695f5fb0 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -286,7 +286,7 @@ static struct edac_pci_ctl_info *i7core_pci; #define ECCx8(pvt) ((pvt)->info.mc_control & (1 << 1)) /* MC_STATUS bits */ -#define ECC_ENABLED(pvt) ((pvt)->info.mc_status & (1 << 3)) +#define ECC_ENABLED(pvt) ((pvt)->info.mc_status & (1 << 4)) #define CH_DISABLED(pvt, ch) ((pvt)->info.mc_status & (1 << ch)) /* MC_MAX_DOD read functions */ |