diff options
| author | Vinod Koul <vinod.koul@intel.com> | 2016-05-17 07:44:30 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2016-05-17 07:44:30 +0300 |
| commit | 8dfc27af62b37b98c29768be7057663fd5c16c4d (patch) | |
| tree | 02b19abd066d08bb116d5b552f694d469515d128 /drivers/dma | |
| parent | 56214883c586a235ea73c07a423b27ee62ea2810 (diff) | |
| parent | 17b3cf4233d77698df0e5ff39303c145ac355d6a (diff) | |
| download | linux-8dfc27af62b37b98c29768be7057663fd5c16c4d.tar.xz | |
Merge branch 'topic/hsu' into for-linus
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/hsu/hsu.c | 8 | ||||
| -rw-r--r-- | drivers/dma/hsu/hsu.h | 4 |
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c index eef145edb936..59d1e7c6fd0f 100644 --- a/drivers/dma/hsu/hsu.c +++ b/drivers/dma/hsu/hsu.c @@ -77,8 +77,8 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc) hsu_chan_writel(hsuc, HSU_CH_MTSR, mtsr); /* Set descriptors */ - count = (desc->nents - desc->active) % HSU_DMA_CHAN_NR_DESC; - for (i = 0; i < count; i++) { + count = desc->nents - desc->active; + for (i = 0; i < count && i < HSU_DMA_CHAN_NR_DESC; i++) { hsu_chan_writel(hsuc, HSU_CH_DxSAR(i), desc->sg[i].addr); hsu_chan_writel(hsuc, HSU_CH_DxTSR(i), desc->sg[i].len); @@ -160,7 +160,7 @@ irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr) return IRQ_NONE; /* Timeout IRQ, need wait some time, see Errata 2 */ - if (hsuc->direction == DMA_DEV_TO_MEM && (sr & HSU_CH_SR_DESCTO_ANY)) + if (sr & HSU_CH_SR_DESCTO_ANY) udelay(2); sr &= ~HSU_CH_SR_DESCTO_ANY; @@ -417,6 +417,8 @@ int hsu_dma_probe(struct hsu_dma_chip *chip) hsu->dma.dev = chip->dev; + dma_set_max_seg_size(hsu->dma.dev, HSU_CH_DxTSR_MASK); + ret = dma_async_device_register(&hsu->dma); if (ret) return ret; diff --git a/drivers/dma/hsu/hsu.h b/drivers/dma/hsu/hsu.h index 578a8ee8cd05..50a9d1bda253 100644 --- a/drivers/dma/hsu/hsu.h +++ b/drivers/dma/hsu/hsu.h @@ -55,6 +55,10 @@ #define HSU_CH_DCR_CHEI BIT(23) #define HSU_CH_DCR_CHTOI(x) BIT(24 + (x)) +/* Bits in HSU_CH_DxTSR */ +#define HSU_CH_DxTSR_MASK GENMASK(15, 0) +#define HSU_CH_DxTSR_TSR(x) ((x) & HSU_CH_DxTSR_MASK) + struct hsu_dma_sg { dma_addr_t addr; unsigned int len; |