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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2016-07-20 02:52:01 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2016-07-21 15:29:30 +0300
commitda7de91c3e237f3ace1aa29b82c69702dc0176c5 (patch)
treef98877f23dd6ac4897d30dfce2ad328c0b48126e /drivers/cpufreq
parentbc95a454b6dcf6aa464deef86e18c1770b8682b8 (diff)
downloadlinux-da7de91c3e237f3ace1aa29b82c69702dc0176c5.tar.xz
cpufreq: intel_pstate: Check cpuid for MSR_HWP_INTERRUPT
The MSR MSR_HWP_INTERRUPT is valid only when CPUID.06H:EAX[8] = 1, so check for feature before accessing this MSR. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r--drivers/cpufreq/intel_pstate.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 9c8a78f9ddce..d8028def199d 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -806,7 +806,8 @@ static void __init intel_pstate_sysfs_expose_params(void)
static void intel_pstate_hwp_enable(struct cpudata *cpudata)
{
/* First disable HWP notification interrupt as we don't process them */
- wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
+ if (static_cpu_has(X86_FEATURE_HWP_NOTIFY))
+ wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
}