diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2014-06-12 19:58:29 +0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2014-06-16 22:48:12 +0400 |
| commit | 0ff36b4f479ec8e0cd9b7a919ab877f2d553cd30 (patch) | |
| tree | 77b895164adc41ba322639a4db649bb7fe1359be /drivers/clocksource/tegra20_timer.c | |
| parent | 5930c1a1f7f8439883d0a2173c6ce51d577e36ec (diff) | |
| download | linux-0ff36b4f479ec8e0cd9b7a919ab877f2d553cd30.tar.xz | |
clocksource: tegra: Use us counter as delay timer
All Tegra SoCs have a freerunning microsecond counter which can be used as a
delay timer.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'drivers/clocksource/tegra20_timer.c')
| -rw-r--r-- | drivers/clocksource/tegra20_timer.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index d1869f02051c..d2616ef16770 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -27,6 +27,7 @@ #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/sched_clock.h> +#include <linux/delay.h> #include <asm/mach/time.h> #include <asm/smp_twd.h> @@ -53,6 +54,8 @@ static void __iomem *rtc_base; static struct timespec persistent_ts; static u64 persistent_ms, last_persistent_ms; +static struct delay_timer tegra_delay_timer; + #define timer_writel(value, reg) \ __raw_writel(value, timer_reg_base + (reg)) #define timer_readl(reg) \ @@ -139,6 +142,11 @@ static void tegra_read_persistent_clock(struct timespec *ts) *ts = *tsp; } +static unsigned long tegra_delay_timer_read_counter_long(void) +{ + return readl(timer_reg_base + TIMERUS_CNTR_1US); +} + static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = (struct clock_event_device *)dev_id; @@ -206,6 +214,11 @@ static void __init tegra20_init_timer(struct device_node *np) BUG(); } + tegra_delay_timer.read_current_timer = + tegra_delay_timer_read_counter_long; + tegra_delay_timer.freq = 1000000; + register_current_timer_delay(&tegra_delay_timer); + ret = setup_irq(tegra_timer_irq.irq, &tegra_timer_irq); if (ret) { pr_err("Failed to register timer IRQ: %d\n", ret); |