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authorPaul Cercueil <paul@crapouillou.net>2019-01-28 05:09:21 +0300
committerStephen Boyd <sboyd@kernel.org>2019-02-22 21:13:44 +0300
commit7ca4c922aad2e3c46767a12f80d01c6b25337b59 (patch)
treefa245dadc52009c474bfc5c0cc066d5b59f988e2 /drivers/clk
parentbc5d922c93491878c44c9216e9d227c7eeb81d7f (diff)
downloadlinux-7ca4c922aad2e3c46767a12f80d01c6b25337b59.tar.xz
clk: ingenic: Fix doc of ingenic_cgu_div_info
The 'div' field does not represent a number of bits used to divide (understand: right-shift) the divider, but a number itself used to divide the divider. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/ingenic/cgu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h
index 502bcbb61b04..e12716d8ce3c 100644
--- a/drivers/clk/ingenic/cgu.h
+++ b/drivers/clk/ingenic/cgu.h
@@ -80,7 +80,7 @@ struct ingenic_cgu_mux_info {
* @reg: offset of the divider control register within the CGU
* @shift: number of bits to left shift the divide value by (ie. the index of
* the lowest bit of the divide value within its control register)
- * @div: number of bits to divide the divider value by (i.e. if the
+ * @div: number to divide the divider value by (i.e. if the
* effective divider value is the value written to the register
* multiplied by some constant)
* @bits: the size of the divide value in bits