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authorTony Lindgren <tony@atomide.com>2018-04-16 20:25:52 +0300
committerTony Lindgren <tony@atomide.com>2018-04-30 22:04:51 +0300
commit09dfe5810762cd6ac09a24342cc23d94d7a8ab70 (patch)
tree02d031d5a4c325ff4b98343198f1fc7d9cbf1681 /drivers/clk
parent8b2830ba170356aed364ae145ca86120f510ec41 (diff)
downloadlinux-09dfe5810762cd6ac09a24342cc23d94d7a8ab70.tar.xz
bus: ti-sysc: Add handling for clkctrl opt clocks
There can be up to eight optional device functional gate gate clocks for each clkctrl instance in clkctrl register bits 8 to 15. Some of them are only needed for module level reset while others may always be needed during use. Let's add support for those and update the binding doc accordingly. Note that the optional clkctrl mux and divider clocks starting at bit 20 can be directly mapped to the child devices, and ti-sysc does not need to manage those. And as GPIOs need the optional clocks for reset, we can now add it with SYSC_QUIRK_OPT_CLKS_IN_RESET. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/clk')
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