diff options
| author | Thierry Reding <treding@nvidia.com> | 2014-07-29 12:17:53 +0400 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-11-26 11:43:23 +0300 |
| commit | 4f4f85fa0b96a35429ebb4bc278d70ae0f72113c (patch) | |
| tree | 566618d20763f01c8a8b66fa1fe5f621373c4123 /drivers/clk/tegra/clk-divider.c | |
| parent | 7f06dd61248a75668bbb39b6fcca6ff407745df8 (diff) | |
| download | linux-4f4f85fa0b96a35429ebb4bc278d70ae0f72113c.tar.xz | |
clk: tegra: Implement memory-controller clock
The memory controller clock runs either at half or the same frequency as
the EMC clock.
Reviewed-By: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-divider.c')
| -rw-r--r-- | drivers/clk/tegra/clk-divider.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 290f9c1a3749..59a5714dfe18 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -185,3 +185,16 @@ struct clk *tegra_clk_register_divider(const char *name, return clk; } + +static const struct clk_div_table mc_div_table[] = { + { .val = 0, .div = 2 }, + { .val = 1, .div = 1 }, + { .val = 0, .div = 0 }, +}; + +struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, + void __iomem *reg, spinlock_t *lock) +{ + return clk_register_divider_table(NULL, name, parent_name, 0, reg, + 16, 1, 0, mc_div_table, lock); +} |