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authorChen-Yu Tsai <wens@csie.org>2014-10-20 18:10:26 +0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-21 23:40:56 +0400
commite94f8cb32d47b157b2af1906eb965290e89ee3fe (patch)
tree192452c87d48dd90c9cb64f2b175cae0d1472ea1 /drivers/clk/sunxi/clk-mod0.c
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
downloadlinux-e94f8cb32d47b157b2af1906eb965290e89ee3fe.tar.xz
clk: sunxi: make factors clock mux mask configurable
Some of the factors-style clocks on the A80 have different widths for the mux values in the registers. Add a .muxmask field to clk_factors_config to make it configurable. Passing a bitmask instead of a width parameter will allow reuse in case we support table-based muxes in the future. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi/clk-mod0.c')
-rw-r--r--drivers/clk/sunxi/clk-mod0.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index 4a563850ee6e..da0524eaee94 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -70,6 +70,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
static const struct factors_data sun4i_a10_mod0_data __initconst = {
.enable = 31,
.mux = 24,
+ .muxmask = BIT(1) | BIT(0),
.table = &sun4i_a10_mod0_config,
.getter = sun4i_a10_get_mod0_factors,
};