diff options
| author | Sean Wang <sean.wang@mediatek.com> | 2018-01-05 11:14:06 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2018-01-11 00:41:15 +0300 |
| commit | bc27360b3c7aedfc385f7fc0527a42918bdeba51 (patch) | |
| tree | f28f2a392dd7f9ff425b3e9de009baa92fbd3421 /drivers/clk/mediatek/Kconfig | |
| parent | 5589818b2fab09c4b7250865a6163c3e2f81a9d6 (diff) | |
| download | linux-bc27360b3c7aedfc385f7fc0527a42918bdeba51.tar.xz | |
clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built
Changes from v1->v2:
Add 'select RESET_CONTROLLER' under COMMON_CLK_MEDIATEK and enable
reset.c to be built when COMMON_CLK_MEDIATEK is selected. That should
be quite reasonable because the reset controller is tightly embedded
inside and exported from these clock subsystems. At least it can be found
on infracfg and pericfg subsystem that both are really fundamental block
lots of devices must depend on.
commit 74cb0d6dde8 ("clk: mediatek: fixup test-building of MediaTek clock
drivers") can let the build system looking into the directory where the
clock drivers resides and then allow test-building the drivers.
But the change also gives rise to certain incorrect behavior which is
reset.c being built even not depending on either COMPILE_TEST or
ARCH_MEDIATEK alternative dependency. To get rid of reset.c being built
unexpectedly on the other platforms, it would be a good change that the
file should be built depending on its own specific configuration rather
than just on generic RESET_CONTROLLER one.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/mediatek/Kconfig')
| -rw-r--r-- | drivers/clk/mediatek/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig index 7338f816c603..1f9ea0f21df1 100644 --- a/drivers/clk/mediatek/Kconfig +++ b/drivers/clk/mediatek/Kconfig @@ -6,6 +6,7 @@ menu "Clock driver for MediaTek SoC" config COMMON_CLK_MEDIATEK bool + select RESET_CONTROLLER ---help--- MediaTek SoCs' clock support. |