diff options
| author | Andi Kleen <ak@linux.intel.com> | 2021-12-15 23:40:29 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-02-16 14:56:11 +0300 |
| commit | ec903b6daa586dedff31c27d6b7d8d84cbd11131 (patch) | |
| tree | c9626f4c8724a4a99d9e49cd9e53e1f4a7a785ff /arch | |
| parent | ef5685971abde1a8f84d6cf1efaf45a216c48d5a (diff) | |
| download | linux-ec903b6daa586dedff31c27d6b7d8d84cbd11131.tar.xz | |
x86/perf: Avoid warning for Arch LBR without XSAVE
[ Upstream commit 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc ]
Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/events/intel/lbr.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 9e6d6eaeb4cb..f455dd93f921 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -1734,6 +1734,9 @@ static bool is_arch_lbr_xsave_available(void) * Check the LBR state with the corresponding software structure. * Disable LBR XSAVES support if the size doesn't match. */ + if (xfeature_size(XFEATURE_LBR) == 0) + return false; + if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size())) return false; |